PIC18LF6310-I/PT Microchip Technology, PIC18LF6310-I/PT Datasheet - Page 57

• Manufacturer Part Number: PIC18LF6310-I/PT
• Description: IC PIC MCU FLASH 4KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF6310-I/PT

• Core Size: 8-Bit
• Program Memory Size: 8KB (4K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 54
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• No. Of Pwm: RoHS Compliant
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.2
The MCLR pin provides a method for triggering a hard
external Reset of the device. A Reset is generated by
holding the pin low. PIC18 Extended MCU devices
have a noise filter in the MCLR Reset path which
detects and ignores small pulses.
The MCLR pin is not driven low by any internal Resets,
including the WDT.
In PIC18F6310/6410/8310/8410 devices, the MCLR
input can be disabled with the MCLRE Configuration
bit. When MCLR is disabled, the pin becomes a digital
input. See
Registers”
5.3
A Power-on Reset pulse is generated on-chip
whenever V
allows the device to start in the initialized state when
V
To take advantage of the POR circuitry, tie the MCLR
pin through a resistor (1 k to 10 k) to V
eliminate external RC components usually needed to
create a Power-on Reset delay. A minimum rise rate for
V
time, see
When the device starts normal operation (i.e., exits the
Reset
(voltage, frequency, temperature, etc.) must be met to
ensure operation. If these conditions are not met, the
device must be held in Reset until the operating
conditions are met.
 2010 Microchip Technology Inc.
DD
DD
is adequate for operation.
is specified (Parameter D004). For a slow rise
condition),
Master Clear (MCLR)
Power-on Reset (POR)
Figure
Section 11.7 “PORTG, TRISG and LATG
for more information.
DD
rises above a certain threshold. This
5-2.
device
operating
DD
parameters
. This will
PIC18F6310/6410/8310/8410
POR events are captured by the POR bit (RCON<1>).
The state of the bit is set to ‘0’ whenever a POR occurs;
it does not change for any other Reset event. POR is
not reset to ‘1’ by any hardware event. To capture
multiple events, the user manually resets the bit to ‘1’
in software following any POR.
FIGURE 5-2:
Note 1: External Power-on Reset circuit is required
V
2: R < 40 k is recommended to make sure that
3: R1  1 k will limit any current flowing into
DD
D
only if the V
The diode, D, helps discharge the capacitor
quickly when V
the voltage drop across R does not violate
the device’s electrical specification.
MCLR from external capacitor, C, in the event
of MCLR/V
Electrostatic Discharge (ESD) or Electrical
Overstress (EOS).
(1)
V
DD
R
C
(2)
EXTERNAL POWER-ON
RESET CIRCUIT (FOR
SLOW V
DD
PP
DD
R1
power-up slope is too slow.
pin breakdown, due to
(3)
powers down.
DD
PIC18FXXXX
MCLR
POWER-UP)
DS39635C-page 57