T89C5121-ICUIL Atmel, T89C5121-ICUIL Datasheet - Page 31
T89C5121-ICUIL
Manufacturer Part Number
T89C5121-ICUIL
Description
IC 8051 MCU W/SMART CARD 24SSOP
Manufacturer
Atmel
Series
89Cr
Datasheet
1.89C5121-SK1.pdf
(115 pages)
Specifications of T89C5121-ICUIL
Core Processor
8051
Core Size
8-Bit
Speed
16MHz
Connectivity
SmartCard, UART/USART
Peripherals
LED, POR, WDT
Number Of I /o
14
Program Memory Size
16KB (16K x 8)
Program Memory Type
Flash RAM
Eeprom Size
16K x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 5.4 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
24-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Other names
Q1468934
T89C5121-ICSIL
T89C5121-ICSIL
T89C5121-ICSIL
T89C5121-ICSIL
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ETU Counter
Guard Time Counter
4164G–SCR–07/06
the different counters. One of the most important counters is the guard time counter that
gives time slots corresponding to the character frame.
It is enabled only in UART mode.
The transition from the receipt mode to the transmit mode is done automatically. Priority
is given to the transmission.
The ETU (Elementary Timing Unit) counter controls the working frequency of the barrel
shifter, in fact, it generates the enable signal of the barrel shifter.
It is 11 bits wide and there is a special compensation mode activated with the most sig-
nificant bit that allows non integer ETU value with a working clock equal to the card
clock .
But the decimal value is limited to a half clock cycle. In fact the bit duration is not fixed. It
takes turns in n clock cycles and n-1 clock cycles. The character duration (10 bits) is
also equal to 10*(n+1/2) clock cycles.
This allows to reach the required precision of the character duration specified by the
ISO7816 standard.
example: F = 372 D = 32 = > ETU = 11.625 clock cycles.
ETU = (ETU[10-0] -0.5 * COMP)*f with ETU[10-0] = 12, COMP = 1 (bit 7 of SCETU1)
To achieve this clock rate we activated the compensation mode and we programmed
the ETU duration to 12 clock cycles.
The result will be a full character duration (10 bits) equal to 11.5 clock cycles.
The minimum time between the leading edge of the start bit of a character and the lead-
ing edge of the start bit of the following character transmitted (Guard time) is controlled
by one counter.
It is 9 bits wide and is incremented at the ETU rate.
Figure 15. Guard Time Counter
ETU Counter
Guard Time Counter
SCGT1
GT[8:0]
SCGT0
Timeout
A/T8xC5121
31
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