T89C5121-ICUIL Atmel, T89C5121-ICUIL Datasheet - Page 61
T89C5121-ICUIL
Manufacturer Part Number
T89C5121-ICUIL
Description
IC 8051 MCU W/SMART CARD 24SSOP
Manufacturer
Atmel
Series
89Cr
Datasheet
1.89C5121-SK1.pdf
(115 pages)
Specifications of T89C5121-ICUIL
Core Processor
8051
Core Size
8-Bit
Speed
16MHz
Connectivity
SmartCard, UART/USART
Peripherals
LED, POR, WDT
Number Of I /o
14
Program Memory Size
16KB (16K x 8)
Program Memory Type
Flash RAM
Eeprom Size
16K x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 5.4 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
24-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Other names
Q1468934
T89C5121-ICSIL
T89C5121-ICSIL
T89C5121-ICSIL
T89C5121-ICSIL
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Memory Mapping
T89C5121 Flash ROM Version
4164G–SCR–07/06
In the products versions, the following internal spaces are defined:
•
•
•
•
The specific accesses from/to these memories are:
•
•
Table 46. RCON Register
Reset Value = XXXX 0XXXb
Three memory blocks are implemented
•
•
•
For first programming or an update, the program can be downloaded in the internal
EEPROM (and in the CRAM) from an external device:
•
•
Bootloader is program masked in ROM space.
The Hardware Byte BLJRB value is 0.
As described on page 7, after Reset, the Bootloader program is executed.
For this purpose, an In-System Programming (ISP) is supplied in a Bootloader. This
Number
RAM
XRAM
CRAM: 16 KBytes Program RAM Memory
ROM
address the XRAM space.
space.
Bit
An internal serial EEPROM can be loaded from external with the application
program.
The ROM memory contains the Bootloader program. The entry point is located at
address F800h. The lower 14K Bytes between address C000h and F7FFh is, also,
used for the Bootloader program.
The CRAM is the application program memory. This memory is mapped in the
External RAM space. The bit RPS in RCON (SFR address 0D1h) is set to map the
CRAM space during MOVX instructions
Either an external EEPROM if detected
or from a host through RS232 serial communication.
7-4
2-0
XRAM: if the bit RPS in RCON (described below) is reset, MOVX instructions
CRAM: if the bit RPS in RCON is set, MOVX instructions address the CRAM
7
3
Mnemonic Description
RPS
Bit
6
-
-
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
CRAM space map bit
Set to map the CRAM space during MOVX instructions
Clear to map the Data space during MOVX. This bit has priority over the EXTRAM
bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5
-
4
RPS
3
2
A/T8xC5121
1
0
61
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