T89C5121-ICUIL Atmel, T89C5121-ICUIL Datasheet - Page 71

• Manufacturer Part Number: T89C5121-ICUIL
• Description: IC 8051 MCU W/SMART CARD 24SSOP
• Manufacturer: Atmel
• Series: 89Cr

Specifications of T89C5121-ICUIL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SmartCard, UART/USART
• Peripherals: LED, POR, WDT
• Number Of I /o: 14
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: Flash RAM
• Eeprom Size: 16K x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 5.4 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 24-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -
• Other names: Q1468934; T89C5121-ICSIL; T89C5121-ICSIL

Autobaud
Table 52. Autobaud Performances
Protection Mechanisms
Transfer Checks
Security
4164G–SCR–07/06
Frequency (MHz)
Baudrate (kHz)
9600
19200
38400
57600
115200
6.176
OK
OK
-
-
-
The ISP feature allows a wide range of baud rates in the user application. It is also
adaptable to a wide range of oscillator frequencies. This is accomplished by measuring
the bit-time of a single bit in a received character. This information is then used to pro-
gram the baud rate in terms of timer counts based on the oscillator frequency. The ISP
feature requires that an initial character (an uppercase U) be sent to the T8xC5121 to
establish the baud rate. Table show the autobaud capability.
Table 53. Synthesis of the Communication Protection Mechanisms
Notes:
Table 54. Synthesis of the Security Mechanisms
Source
MCU
MCU
Source
UART ISP
UART ISP
UART ISP
UART ISP
1. The transfer of SSB Byte is also secured by CRC as the CRC is computed on all the
2. If a bad transfer has occurred in the Internal EEPROM (CRC is bad), as the CRC
OK
16K data.
check is finally done at the end of CRAM programming, application program will NOT
be executed after any Reset.
8
-
-
-
Target
MCU
CRAM
Intern. EEP
Target
Intern. EEP
CRAM
Intern. EEP
11.0592
OK
OK
OK
OK
-
Check
Checksum included in commands is tested with calculated checksum: if
bad, X echo returned to ISP
CRC computed during CRAM Write operation: if error an error code is
applied on P3.7. Error code’Z’ is returned to ISP.
Same protection as above because CRAM is written in sequence after
each page programming of EEP
Case
Read access
Read access
Partial Programming
which would not fit
with old CRC
OK
OK
OK
12
-
-
14.3
OK
OK
OK
Ok
-
Protection
SSB level 2 must be set (done, if
selected, at ISP Programming or Ext
EEP Download)
SSB level 2 IN CRAM must be set (SSB
is downloaded from Int EEP after Reset)
SSB level 1 must be set (done, if
selected, at ISP Programming or Ext
EEP Download)
Then the EEP must be, first, erased
before reprogramming.
Programming is done on all the memory
space
14.7456
A/T8xC5121
OK
OK
OK
OK
OK
OK
OK
16
-
-
-
71