ATMEGA169V-1MC Atmel, ATMEGA169V-1MC Datasheet - Page 151

• Manufacturer Part Number: ATMEGA169V-1MC
• Description: IC MCU AVR 16K 1.8V 1MHZ 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA169V-1MC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 1MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-MLF®, 64-QFN
• For Use With: ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

USART
Overview
2514H–AVR–05/03
The Universal Synchronous and Asynchronous serial Receiver and Transmitter
(USART) is a highly flexible serial communication device. The main features are:
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A simplified block diagram of the USART Transmitter is shown in Figure 68. CPU acces-
sible I/O Registers and I/O pins are shown in bold.
Figure 68. USART Block Diagram
Note:
Full Duplex Operation (Independent Serial Receive and Transmit Registers)
Asynchronous or Synchronous Operation
Master or Slave Clocked Synchronous Operation
High Resolution Baud Rate Generator
Supports Serial Frames with 5, 6, 7, 8, or 9 Data Bits and 1 or 2 Stop Bits
Odd or Even Parity Generation and Parity Check Supported by Hardware
Data OverRun Detection
Framing Error Detection
Noise Filtering Includes False Start Bit Detection and Digital Low Pass Filter
Three Separate Interrupts on TX Complete, TX Data Register Empty and RX Complete
Multi-processor Communication Mode
Double Speed Asynchronous Communication Mode
1. Refer to Figure 1 on page 2, Table 36 on page 66, and Table 30 on page 62 for
USART pin placement.
UCSRA
TRANSMIT SHIFT REGISTER
RECEIVE SHIFT REGISTER
BAUD RATE GENERATOR
UDR (Transmit)
UDR (Receive)
UBRR[H:L]
(1)
UCSRB
GENERATOR
SYNC LOGIC
RECOVERY
RECOVERY
CHECKER
PARITY
PARITY
CLOCK
DATA
OSC
ATmega169V/L
Clock Generator
CONTROL
CONTROL
CONTROL
CONTROL
CONTROL
Transmitter
PIN
PIN
PIN
TX
RX
Receiver
UCSRC
XCK
RxD
TxD
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