ATMEGA169V-1MC Atmel, ATMEGA169V-1MC Datasheet - Page 348

• Manufacturer Part Number: ATMEGA169V-1MC
• Description: IC MCU AVR 16K 1.8V 1MHZ 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA169V-1MC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 1MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-MLF®, 64-QFN
• For Use With: ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Data Sheet Change
Log for ATmega169
Changes from Rev.
2514A-08/02 to Rev.
2514B-09/02
Changes from Rev.
2514B-09/02 to Rev.
2514C-11/02
Changes from Rev.
2514C-11/02 to Rev.
2514D-01/03
348
ATmega169V/L
Please note that the referring page numbers in this section are referred to this docu-
ment. The referring revision in this section are referring to the document revision.
1. Canged the Endurance on the Flash to 10,000 Write/Erase Cycles.
1. Added “Errata” on page 346.
2. Added Information for the 64-pad MLF Package in “Ordering Information” on
3. Changed Temerature Range and Removed Industrial Ordering Codes in
1. Added TCK frequency limit in “Programming via the JTAG Interface” on page
2. Added Chip Erase as a first step in “Programming the Flash” on page 294 and
3. Added the section “Unconnected Pins” on page 56.
4. Added tips on how to disable the OCD system in “On-chip Debug System” on
5. Corrected interrupt addresses. ADC and ANA_COMP had swapped places.
6. Improved the table in “SPI Timing Characteristics” on page 299 and removed
7. Changed “will be ignored” to “must be written to zero” for unused Z-pointer
8. Corrected “LCD Frame Complete” to “LCD Start of Frame” in the LCDCRA
9. Changed OUT to STS and IN to LDS in USI code examples, and corrected
10. Removed TOSKON and TOSCK from Table 103 on page 239, and g10 and g20
11. Changed from 4 to 16 MIPS and MHz in the device Features list.
12. Corrected Port A to Port F in “AVCC” on page 6 under “Pin Descriptions” on
page 343 and “Packaging Information” on page 344.
“Packaging Information” on page 344.
284.
“Programming the EEPROM” on page 295.
page 35.
the table in “SPI Serial Programming Characteristics” on page 284.
bits in “Performing a Page Write” on page 260.
Register description on page 220.
f
cannot be used. LDS and STS take one more cycle when executed, so f
had to be changed accordingly.
from Figure 114 on page 241 and Table 105 on page 242, because these sig-
nals do not exist in boundary scan.
page 5.
SCKmax
. The USI I/O Registers are in the extended I/O space, so IN and OUT
2514H–AVR–05/03
SCKmax