ATMEGA169V-1MC Atmel, ATMEGA169V-1MC Datasheet - Page 23

• Manufacturer Part Number: ATMEGA169V-1MC
• Description: IC MCU AVR 16K 1.8V 1MHZ 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA169V-1MC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 1MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-MLF®, 64-QFN
• For Use With: ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

System Clock and
Clock Options
Clock Systems and their
Distribution
CPU Clock – clk
I/O Clock – clk
Flash Clock – clk
Asynchronous Timer Clock –
clk
2514H–AVR–05/03
ASY
I/O
CPU
FLASH
Figure 11 presents the principal clock systems in the AVR and their distribution. All of
the clocks need not be active at a given time. In order to reduce power consumption, the
clocks to modules not being used can be halted by using different sleep modes, as
described in “Power Management and Sleep Modes” on page 32. The clock systems
are detailed below.
Figure 11. Clock Distribution
The CPU clock is routed to parts of the system concerned with operation of the AVR
core. Examples of such modules are the General Purpose Register File, the Status Reg-
ister and the data memory holding the Stack Pointer. Halting the CPU clock inhibits the
core from performing general operations and calculations.
The I/O clock is used by the majority of the I/O modules, like Timer/Counters, SPI, and
USART. The I/O clock is also used by the External Interrupt module, but note that some
external interrupts are detected by asynchronous logic, allowing such interrupts to be
detected even if the I/O clock is halted. Also note that start condition detection in the USI
module is carried out asynchronously when clk
detection in all sleep modes.
The Flash clock controls operation of the Flash interface. The Flash clock is usually
active simultaneously with the CPU clock.
The Asynchronous Timer clock allows the Asynchronous Timer/Counter and the LCD
controller to be clocked directly from an external clock or an external 32 kHz clock crys-
tal. The dedicated clock domain allows using this Timer/Counter as a real-time counter
even when the device is in sleep mode. It also allows the LCD controller output to con-
tinue while the rest of the device is in sleep mode.
LCD Controller
Asynchronous
Timer/Counter
Timer/Counter
Oscillator
General I/O
Modules
External Clock
clk
clk
ASY
I/O
Control Unit
AVR Clock
Multiplexer
Clock
Source clock
Oscillator
I/O
Crystal
is halted, enabling USI start condition
CPU Core
clk
clk
Reset Logic
CPU
FLASH
ATmega169V/L
Crystal Oscillator
Watchdog clock
Low-frequency
Watchdog Timer
RAM
Watchdog
Oscillator
Calibrated RC
Flash and
EEPROM
Oscillator
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