AT91SAM7X256B-CU Atmel, AT91SAM7X256B-CU Datasheet - Page 530
![IC MCU 256KB FLASH 100TFBGA](/photos/6/89/68968/313-100-cbga_sml.jpg)
AT91SAM7X256B-CU
Manufacturer Part Number
AT91SAM7X256B-CU
Description
IC MCU 256KB FLASH 100TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM7X256B-CU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Processor Series
91S
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
CAN, Ethernet, SPI, I2S, TWI, USART, USB
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
62
Number Of Timers
3
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Package
100TFBGA
Device Core
ARM7TDMI
Family Name
91S
Maximum Speed
55 MHz
On-chip Adc
8-chx10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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Figure 36-18. Consumer Handling
36.7.4
36.7.4.1
Figure 36-19. Mailbox Timestamp
6120H–ATARM–17-Feb-09
MTIMESTAMP
MTIMESTAMP
(CAN_MCRx)
(CAN_MSRx)
(CAN_MSRx)
TIMESTAMP
(CAN_TSTP)
CAN_MDHx)
(CAN_MSRx)
(CAN_MDLx
(CAN_MSRy)
(CAN_MR)
CAN BUS
CAN BUS
CAN_TIM
TEOF
MRDY
MTCR
MMI
CAN Controller Timing Modes
Timestamping Mode
Using the free running 16-bit internal timer, the CAN controller can be set in one of the two fol-
lowing timing modes:
Timestamping Mode is enabled by clearing the TTM bit in the CAN_MR register. Time Triggered
Mode is enabled by setting the TTM bit in the CAN_MR register.
Each mailbox has its own timestamp value. Each time a message is sent or received by a mail-
box, the 16-bit value MTIMESTAMP of the CAN_TIMESTP register is transferred to the LSB bits
of the CAN_MSRx register. The value read in the CAN_MSRx register corresponds to the inter-
nal timer value at the Start Of Frame or the End Of Frame of the message handled by the
mailbox.
Remote Frame
Timestamp 1
• Timestamping Mode: The value of the internal timer is captured at each Start Of Frame or
• Time Triggered Mode: The mailbox transfer operation is triggered when the internal timer
Timestamp 1
Message 1
each End Of Frame.
reaches the mailbox trigger.
Start of Frame
Message x
AT91SAM7X512/256/128 Preliminary
End of Frame
Message x
Remote Frame
Message 2
Message y
Timestamp 2
Timestamp 2
Message y
530
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