P89LPC936FDH,518 NXP Semiconductors, P89LPC936FDH,518 Datasheet - Page 32

• Manufacturer Part Number: P89LPC936FDH,518
• Description: IC 80C51 MCU FLASH 16K 28TSSOP
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC936FDH,518

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 28-TSSOP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 26
• Eeprom Size: 512 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x8b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89LPC9x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 2
• Operating Supply Voltage: 21 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 8-bit
• On-chip Dac: 2-ch x 8-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1014 - BOARD FOR LPC9XX TSSOP622-1008 - BOARD FOR LPC9103 10-HVSON622-1006 - SOCKET ADAPTER BOARDMCB900K - BOARD PROTOTYPE NXP 89LPC9EPM900K - EMULATOR/PROGRAMMER NXP P89LPC9568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART622-1002 - USB IN-CIRCUIT PROG LPC9XX568-1759 - EMULATOR DEBUGGER/PROGRMMR LPC9X568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4339-2; 935277841518; P89LPC936FDH-T; P89LPC936FDH-T

NXP Semiconductors
P89LPC933_934_935_936
Product data sheet
8.14.1 Brownout detection
8.14.2 Power-on detection
8.15.1 Idle mode
8.15.2 Power-down mode
8.15 Power reduction modes
The brownout detect function determines if the power supply voltage drops below a
certain level. The default operation is for a brownout detection to cause a processor reset,
however it may alternatively be configured to generate an interrupt.
Brownout detection may be enabled or disabled in software.
If brownout detection is enabled the brownout condition occurs when V
brownout trip voltage, V
rises above V
that can be below 2.7 V, BOE should be left in the unprogrammed state so that the device
can operate at 2.4 V, otherwise continuous brownout reset may prevent the device from
operating.
For correct activation of brownout detect, the V
Please see
The power-on detect has a function similar to the brownout detect, but is designed to work
as power comes up initially, before the power supply voltage reaches a level where
brownout detect can work. The POF flag in the RSTSRC register is set to indicate an
initial power-up condition. The POF flag will remain set until cleared by software.
The P89LPC933/934/935/936 supports three different power reduction modes. These
modes are Idle mode, Power-down mode, and total Power-down mode.
Idle mode leaves peripherals running in order to allow them to activate the processor
when an interrupt is generated. Any enabled interrupt source or reset may terminate Idle
mode.
The Power-down mode stops the oscillator in order to minimize power consumption. The
P89LPC933/934/935/936 exits Power-down mode via any reset, or certain interrupts. In
Power-down mode, the power supply voltage may be reduced to the RAM keep-alive
voltage V
entered. SFR contents are not guaranteed after V
it is highly recommended to wake-up the processor via reset in this case. V
raised to within the operating range before the Power-down mode is exited.
Some chip functions continue to operate and draw power during Power-down mode,
increasing the total power used during power-down. These include: brownout detect,
watchdog timer, Comparators (note that Comparators can be powered-down separately),
and RTC/system timer. The internal RC oscillator is disabled unless both the RC oscillator
has been selected as the system clock and the RTC is enabled.
RAM
Table 11 “Static characteristics”
. This retains the RAM contents at the point where Power-down mode was
bo
All information provided in this document is subject to legal disclaimers.
. If the P89LPC933/934/935/936 device is to operate with a power supply
Rev. 8 — 12 January 2011
bo
8-bit microcontroller with accelerated two-clock 80C51 core
(see
Table 11 “Static
P89LPC933/934/935/936
for specifications.
characteristics”), and is negated when V
DD
DD
rise and fall times must be observed.
has been lowered to V
DD
© NXP B.V. 2011. All rights reserved.
falls below the
DDR
DD
must be
, therefore
32 of 77
DD