P89LPC936FDH,518 NXP Semiconductors, P89LPC936FDH,518 Datasheet - Page 76

IC 80C51 MCU FLASH 16K 28TSSOP

P89LPC936FDH,518

Manufacturer Part Number
P89LPC936FDH,518
Description
IC 80C51 MCU FLASH 16K 28TSSOP
Manufacturer
NXP Semiconductors
Series
LPC900r
Datasheet

Specifications of P89LPC936FDH,518

Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
28-TSSOP
Core Processor
8051
Core Size
8-Bit
Speed
18MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
26
Eeprom Size
512 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x8b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
P89LPC9x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
18 MHz
Number Of Programmable I/os
26
Number Of Timers
2
Operating Supply Voltage
21 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 8-bit
On-chip Dac
2-ch x 8-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1014 - BOARD FOR LPC9XX TSSOP622-1008 - BOARD FOR LPC9103 10-HVSON622-1006 - SOCKET ADAPTER BOARDMCB900K - BOARD PROTOTYPE NXP 89LPC9EPM900K - EMULATOR/PROGRAMMER NXP P89LPC9568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART622-1002 - USB IN-CIRCUIT PROG LPC9XX568-1759 - EMULATOR DEBUGGER/PROGRMMR LPC9X568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4339-2
935277841518
P89LPC936FDH-T
P89LPC936FDH-T
NXP Semiconductors
19. Contents
1
2
2.1
2.2
3
4
4.1
5
6
6.1
6.2
7
8
8.1
8.2
8.3
8.3.1
8.3.2
8.3.3
8.3.4
8.3.5
8.3.6
8.4
8.5
8.6
8.7
8.8
8.9
8.10
8.11
8.12
8.12.1
8.13
8.13.1
8.13.1.1
8.13.1.2
8.13.1.3
8.13.1.4
8.13.2
8.13.3
8.14
8.14.1
8.14.2
8.15
8.15.1
8.15.2
P89LPC933_934_935_936
Product data sheet
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Product comparison overview . . . . . . . . . . . . . 3
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pinning information . . . . . . . . . . . . . . . . . . . . . . 5
Logic symbols . . . . . . . . . . . . . . . . . . . . . . . . . 11
Functional description . . . . . . . . . . . . . . . . . . 12
High speed oscillator option . . . . . . . . . . . . . . 24
Data RAM arrangement . . . . . . . . . . . . . . . . . 28
Power monitoring functions . . . . . . . . . . . . . . 31
Principal features . . . . . . . . . . . . . . . . . . . . . . . 1
Additional features . . . . . . . . . . . . . . . . . . . . . . 2
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 7
Special function registers . . . . . . . . . . . . . . . . 12
Enhanced CPU . . . . . . . . . . . . . . . . . . . . . . . . 24
Clocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Clock definitions . . . . . . . . . . . . . . . . . . . . . . . 24
CPU clock (OSCCLK). . . . . . . . . . . . . . . . . . . 24
Low speed oscillator option . . . . . . . . . . . . . . 24
Medium speed oscillator option . . . . . . . . . . . 24
Clock output . . . . . . . . . . . . . . . . . . . . . . . . . . 24
On-chip RC oscillator option . . . . . . . . . . . . . . 25
Watchdog oscillator option . . . . . . . . . . . . . . . 25
External clock input option . . . . . . . . . . . . . . . 25
CCLK wake-up delay . . . . . . . . . . . . . . . . . . . 27
CCLK modification: DIVM register . . . . . . . . . 27
Low power select . . . . . . . . . . . . . . . . . . . . . . 27
Memory organization . . . . . . . . . . . . . . . . . . . 27
Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
External interrupt inputs . . . . . . . . . . . . . . . . . 28
I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Port configurations . . . . . . . . . . . . . . . . . . . . . 30
Quasi-bidirectional output configuration . . . . . 30
Open-drain output configuration . . . . . . . . . . . 30
Input-only configuration . . . . . . . . . . . . . . . . . 31
Push-pull output configuration . . . . . . . . . . . . 31
Port 0 analog functions . . . . . . . . . . . . . . . . . . 31
Additional port features. . . . . . . . . . . . . . . . . . 31
Brownout detection . . . . . . . . . . . . . . . . . . . . . 32
Power-on detection. . . . . . . . . . . . . . . . . . . . . 32
Power reduction modes . . . . . . . . . . . . . . . . . 32
Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Power-down mode . . . . . . . . . . . . . . . . . . . . . 32
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 12 January 2011
8-bit microcontroller with accelerated two-clock 80C51 core
8.15.3
8.16
8.16.1
8.17
8.17.1
8.17.2
8.17.3
8.17.4
8.17.5
8.17.6
8.18
8.19
8.19.1
8.19.2
8.19.3
8.19.4
8.19.5
8.19.6
8.19.7
8.19.8
8.19.9
8.20
8.20.1
8.20.2
8.20.3
8.20.4
8.20.5
8.20.6
8.20.7
8.20.8
8.20.9
8.20.10
8.21
8.22
8.22.1
8.23
8.23.1
8.23.2
8.23.3
8.24
8.25
8.26
8.26.1
8.26.2
8.27
8.28
P89LPC933/934/935/936
Total Power-down mode . . . . . . . . . . . . . . . . 33
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Reset vector. . . . . . . . . . . . . . . . . . . . . . . . . . 33
Timers/counters 0 and 1 . . . . . . . . . . . . . . . . 34
Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Mode 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Timer overflow toggle output . . . . . . . . . . . . . 34
RTC/system timer . . . . . . . . . . . . . . . . . . . . . 34
CCU (P89LPC935/936) . . . . . . . . . . . . . . . . . 35
CCU clock . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
CCUCLK prescaling. . . . . . . . . . . . . . . . . . . . 35
Basic timer operation . . . . . . . . . . . . . . . . . . . 35
Output compare . . . . . . . . . . . . . . . . . . . . . . . 35
Input capture . . . . . . . . . . . . . . . . . . . . . . . . . 35
PWM operation . . . . . . . . . . . . . . . . . . . . . . . 36
Alternating output mode. . . . . . . . . . . . . . . . . 37
PLL operation. . . . . . . . . . . . . . . . . . . . . . . . . 37
CCU interrupts . . . . . . . . . . . . . . . . . . . . . . . . 38
UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Baud rate generator and selection. . . . . . . . . 39
Framing error . . . . . . . . . . . . . . . . . . . . . . . . . 39
Break detect. . . . . . . . . . . . . . . . . . . . . . . . . . 40
Double buffering. . . . . . . . . . . . . . . . . . . . . . . 40
Transmit interrupts with double
buffering enabled (modes 1, 2 and 3) . . . . . . 40
The 9
buffering (modes 1, 2 and 3) . . . . . . . . . . . . . 40
I
SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Typical SPI configurations . . . . . . . . . . . . . . . 44
Analog comparators . . . . . . . . . . . . . . . . . . . . 46
Internal reference voltage . . . . . . . . . . . . . . . 46
Comparator interrupt . . . . . . . . . . . . . . . . . . . 47
Comparators and power reduction modes . . . 47
Keypad interrupt. . . . . . . . . . . . . . . . . . . . . . . 47
Watchdog timer . . . . . . . . . . . . . . . . . . . . . . . 48
Additional features . . . . . . . . . . . . . . . . . . . . . 48
Software reset . . . . . . . . . . . . . . . . . . . . . . . . 48
Dual data pointers . . . . . . . . . . . . . . . . . . . . . 48
Data EEPROM (P89LPC935/936) . . . . . . . . . 49
Flash program memory . . . . . . . . . . . . . . . . . 49
2
C-bus serial interface. . . . . . . . . . . . . . . . . . 41
th
bit (bit 8) in double
© NXP B.V. 2011. All rights reserved.
continued >>
76 of 77

Related parts for P89LPC936FDH,518