LPC1313FBD48,151 NXP Semiconductors, LPC1313FBD48,151 Datasheet - Page 131

• Manufacturer Part Number: LPC1313FBD48,151
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1313FBD48,151

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 42
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: OM11041
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: LPC1000
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 72MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 42
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: LPC1000
• Maximum Speed: 72 MHz
• Number Of Programmable I/os: 42
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4918 - KIT DEV FOR LPC1313622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4914; 935289651151

NXP Semiconductors
Table 155. USB Device Interrupt registers bit allocation
UM10375
User manual
Bit
Symbol
Bit
Symbol
Bit
Symbol
Bit
Symbol
9.10.1.1 USB Device Interrupt Status register (USBDevIntSt - 0x4002 0000)
9.10.1 Device interrupt registers
15
EP6
-
31
23
7
-
-
Table 154. Register overview: USB device (base address 0x4002 0000)
[1]
[2]
Table 155
USBDevIntEn, and USBDevIntClr.
The USBDevIntSt register holds the status of each interrupt whether it is enabled or not. A
0 indicates no interrupt and 1 indicates the presence of the interrupt. USBDevIntSt is a
read only register.
Name
Device interrupt registers
USBDevIntSt
USBDevIntEn
USBDevIntClr
USBDevIntSet
SIE command registers
USBCmdCode
USBCmdData
USB data transfer registers
USBRxData
USBTxData
USBRxPLen
USBTxPLen
USBCtrl
Miscellaneous registers
USBDevFIQSel
14
Reset value reflects the data stored in used bits only. It does not include reserved bits content.
Reading WO register will return an invalid value.
-
EP5
30
22
6
-
-
shows the bit allocation for the device interrupt registers USBDevIntSt,
TxENDPKT
13
All information provided in this document is subject to legal disclaimers.
EP4
29
21
5
-
-
Access
RO
R/W
WO
WO
WO
RO
RO
WO
RO
WO
R/W
WO
Rev. 2 — 7 July 2010
RxENDPKT
[2]
[2]
[2]
[2]
[2]
[2]
12
EP3
Address
offset
0x00
0x04
0x08
0x0C
0x10
0x14
0x18
0x1C
0x20
0x24
0x28
0x2C
28
20
4
-
-
CD_FULL
Description
USB Device Interrupt Status
USB Device Interrupt Enable
USB Device Interrupt Clear
USB Device Interrupt Set
USB Command Code
USB Command Data
USB Receive Data
USB Transmit Data
USB Receive Packet Length
USB Transmit Packet Length
USB Control
USB Device FIQ select
11
Chapter 9: LPC13xx USB device controller
EP2
27
19
3
-
-
CC_EMPTY
10
EP1
26
18
2
-
-
DEV_STAT
EP0
25
17
UM10375
9
1
-
-
© NXP B.V. 2010. All rights reserved.
Reset value
0x0000 0010
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x00
FRAME
133 of 333
EP7
24
16
8
0
-
-
[1]