LPC1313FBD48,151 NXP Semiconductors, LPC1313FBD48,151 Datasheet - Page 53

IC MCU 32BIT 32KB FLASH 48LQFP

LPC1313FBD48,151

Manufacturer Part Number
LPC1313FBD48,151
Description
IC MCU 32BIT 32KB FLASH 48LQFP
Manufacturer
NXP Semiconductors
Series
LPC13xxr
Datasheets

Specifications of LPC1313FBD48,151

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
48-LQFP
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
I²C, Microwire, SPI, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
42
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC13
Core
ARM Cortex M3
Data Bus Width
32 bit
Interface Type
I2C, UART
Maximum Clock Frequency
72 MHz
Number Of Timers
2
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
OM11041
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
LPC1000
Device Core
ARM Cortex-M3
Device Core Size
32b
Frequency (max)
72MHz
Total Internal Ram Size
8KB
# I/os (max)
42
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Package
48LQFP
Family Name
LPC1000
Maximum Speed
72 MHz
Number Of Programmable I/os
42
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-4918 - KIT DEV FOR LPC1313622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4914
935289651151

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NXP Semiconductors
UM10375
User manual
Table 61.
[1]
Exception
Number
39 to 0
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
See
Section 3.1
Connection of interrupt sources to the Vectored Interrupt Controller
Vector
Offset
0xA0
0xA4
0xA8
0xAC
0xB0
0xB4
0xB8
0xBC
0xC0
0xC4
0xC8
0xCC
-
0xD4
0xD8
0xDC
0xE0
All information provided in this document is subject to legal disclaimers.
for wake-up pins not used in the HVQFN package.
Function
start logic wake-up
interrupts
I2C0
CT16B0
CT16B1
CT32B0
CT32B1
SSP
UART
USB IRQ interrupt
USB FIQ interrupt
ADC
WDT
BOD
-
PIO_3
PIO_2
PIO_1
PIO_0
Rev. 2 — 7 July 2010
Flag(s)
Each interrupt is connected to a PIO input pin serving
as wake-up pin from Deep-sleep mode (see
Section 3.5.36
Interrupts 0 to 11 are connected to PIO0_0 to
PIO0_11; interrupts 12 to 23 are connected to
PIO1_0 to PIO1_11; interrupts 24 to 35 are
connected to PIO2_0 to PIO2_11; interrupts 36 to 39
are connected to PIO3_0 to PIO3_3.
SI (state change)
Match 0 - 2
Capture 0
Match 0 - 1
Capture 0
Match 0 - 3
Capture 0
Match 0 - 3
Capture 0
Tx FIFO half empty
Rx FIFO half full
Rx Timeout
Rx Overrun
Rx Line Status (RLS)
Transmit Holding Register Empty (THRE)
Rx Data Available (RDA)
Character Time-out Indicator (CTI)
Modem Control Change
End of Auto-Baud (ABEO)
Auto-Baud Time-Out (ABTO)
USB low-priority interrupt
USB high-priority interrupt
A/D Converter end of conversion
Watchdog interrupt (WDINT)
Brown-out detect
Reserved
GPIO interrupt status of port 3
GPIO interrupt status of port 2
GPIO interrupt status of port 1
GPIO interrupt status of port 0
Chapter 5: LPC13xx Interrupt controller
and
Section
3.5.40).
UM10375
© NXP B.V. 2010. All rights reserved.
[1]
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