LPC2470FET208,551 NXP Semiconductors, LPC2470FET208,551 Datasheet - Page 270
LPC2470FET208,551
Manufacturer Part Number
LPC2470FET208,551
Description
IC ARM7 MCU LCD 208-TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets
1.OM11077.pdf
(792 pages)
2.LPC2470FET208551.pdf
(89 pages)
3.LPC2470FET208551.pdf
(91 pages)
Specifications of LPC2470FET208,551
Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Type
ROMless
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2470U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4362
935284071551
LPC2470FET208-S
935284071551
LPC2470FET208-S
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UM10237_4
User manual
9.14 Power management
An imperfect filter is available, based on a hash mechanism. This filter applies a hash
function to the destination address and uses the hash to access a table that indicates if
the frame should be accepted. The advantage of this type of filter is that a small table can
cover any possible address. The disadvantage is that the filtering is imperfect, i.e.
sometimes frames are accepted that should have been discarded.
Enabling and disabling filtering
The filters as defined in the sections above can be bypassed by setting the PassRxFilter
bit in the Command register. When the PassRxFilter bit is set, all receive frames will be
passed to memory. In this case the device driver software has to implement all filtering
functionality in software. Setting the PassRxFilter bit does not affect the runt frame filtering
as defined in the next section.
Runt frames
A frame with less than 64 bytes (or 68 bytes for VLAN frames) is shorter than the
minimum Ethernet frame size and therefore considered erroneous; they might be collision
fragments. The receive datapath automatically filters and discards these runt frames
without writing them to memory and using a receive descriptor.
When a runt frame has a correct CRC there is a possibility that it is intended to be useful.
The device driver can receive the runt frames with correct CRC by setting the
PassRuntFrame bit of the Command register to 1.
The Ethernet block supports power management by means of clock switching. All clocks
in the Ethernet core can be switched off. If Wake-up on LAN is needed, the rx_clk should
not be switched off.
•
•
Hash function:
– The standard Ethernet cyclic redundancy check (CRC) function is calculated from
– The device driver can initialize the hash filter table by writing to the registers
Multicast and unicast
– The imperfect hash filter can be applied to multicast addresses, by setting the
– The same imperfect hash filter that is available for multicast addresses can also be
the 6 byte destination address in the Ethernet frame (this CRC is calculated
anyway as part of calculating the CRC of the whole frame), then bits [28:23] out of
the 32 bits CRC result are taken to form the hash. The 6 bit hash is used to access
the hash table: it is used as an index in the 64 bit HashFilter register that has been
programmed with accept values. If the selected accept value is 1, the frame is
accepted.
HashFilterL and HashfilterH. HashFilterL contains bits 0 through 31 of the table
and HashFilterH contains bit 32 through 63 of the table. So, hash value 0
corresponds to bit 0 of the HashfilterL register and hash value 63 corresponds to
bit 31 of the HashFilterH register.
AcceptMulticastHashEn bit in the RxFilter register to 1.
used for unicast addresses. This is useful to be able to respond to a multitude of
unicast addresses without enabling all unicast addresses. The hash filter can be
applied to unicast addresses by setting the AcceptUnicastHashEn bit in the
RxFilter register to 1.
Rev. 04 — 26 August 2009
Chapter 11: LPC24XX Ethernet
UM10237
© NXP B.V. 2009. All rights reserved.
270 of 792
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