LPC1769FBD100,551 NXP Semiconductors, LPC1769FBD100,551 Datasheet - Page 58

IC ARM CORTEX MCU 512K 100-LQFP

LPC1769FBD100,551

Manufacturer Part Number
LPC1769FBD100,551
Description
IC ARM CORTEX MCU 512K 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr

Specifications of LPC1769FBD100,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
100-LQFP
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC17
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
Ethernet, USB, OTG, CAN
Maximum Clock Frequency
120 MHz
Number Of Programmable I/os
70
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
On-chip Dac
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4966
935290522551

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC1769FBD100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 15.
T
[1]
LPC1769_68_67_66_65_64_63
Product data sheet
Symbol
SSP interface
t
su(SPI_MISO)
amb
Fig 20. MISO line set-up time in SSP Master mode
The peripheral clock for SSP is PCLK = CCLK = 20 MHz.
= 25
°
C; V
Dynamic characteristic: SSP interface
Parameter
SPI_MISO set-up time
DD(3V3)
11.7 SSP interface
MOSI
MISO
shifting edges
SCK
over specified ranges.
All information provided in this document is subject to legal disclaimers.
Conditions
measured in SPI Master mode;
see
Figure 20
Rev. 6.01 — 11 March 2011
t
su(SPI_MISO)
LPC1769/68/67/66/65/64/63
[1]
32-bit ARM Cortex-M3 microcontroller
Min
30
sampling edges
Typ
002aad326
© NXP B.V. 2011. All rights reserved.
Max
-
58 of 79
Unit
ns

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