LPC1769FBD100,551 NXP Semiconductors, LPC1769FBD100,551 Datasheet - Page 75
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LPC1769FBD100,551
Manufacturer Part Number
LPC1769FBD100,551
Description
IC ARM CORTEX MCU 512K 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr
Datasheets
1.OM11043.pdf
(79 pages)
2.LPC1767FBD100551.pdf
(2 pages)
3.LPC1767FBD100551.pdf
(840 pages)
4.LPC1769FBD100551.pdf
(66 pages)
Specifications of LPC1769FBD100,551
Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
100-LQFP
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC17
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
Ethernet, USB, OTG, CAN
Maximum Clock Frequency
120 MHz
Number Of Programmable I/os
70
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
On-chip Dac
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4966
935290522551
935290522551
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1769FBD100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
17. Revision history
Table 25.
LPC1769_68_67_66_65_64_63
Product data sheet
Document ID
LPC1769_68_67_66_65_64_63
v.6.01
Modifications:
LPC1769_68_67_66_65_64_63 v.6 20100825
Modifications:
LPC1769_68_67_66_65_64_63 v.5 20100716
LPC1769_68_67_66_65_64 v.4
LPC1768_67_66_65_64 v.3
LPC1768_66_65_64 v.2
LPC1768_66_65_64 v.1
Revision history
Release
date
<tbd>
20100201
20091119
20090211
20090115
•
•
•
•
•
•
•
•
•
Pin description of pins P0[29] and P0[30] updated in
are not 5 V tolerant.
Typical value for Parameter N
Parameter V
Table
Condition 3.0 V ≤ V
Typical values for parameters I
power-down mode corrected in
Table note 11
For Deep power-down mode,
Part LPC1768TFBGA added.
Section
Added
All information provided in this document is subject to legal disclaimers.
7.
Section
Rev. 6.01 — 11 March 2011
7.30.2; BOD level corrected.
Data sheet status
Product data sheet
Product data sheet
Product data sheet
Product data sheet
Product data sheet
Objective data sheet -
Objective data sheet -
hys
updated.
10.2.
for I
LPC1769/68/67/66/65/64/63
DD(3V3)
2
C bus pins: typical value corrected V
≤ 3.6 V added in
endu
Figure 9
DD(REG)(3V3)
Table 7
Change notice Supersedes
-
-
-
-
-
added in
32-bit ARM Cortex-M3 microcontroller
updated and
and
and I
Table
Table
Table note
BAT
LPC1769_68_67_66_65_64 v.6
LPC1769_68_67_66_65_64 v.5
LPC1769_68_67_66_65_64 v.4
LPC1768_67_66_65_64 v.3
LPC1768_66_65_64 v.2
LPC1768_66_65_64 v.1
-
9.
16.
with condition Deep
Figure 10
Table note 5
9,
hys
Table note
= 0.05V
© NXP B.V. 2011. All rights reserved.
added.
of
Table
DD(3V3)
10, and
4. Pins
75 of 79
in