EP9307-CRZ Cirrus Logic Inc, EP9307-CRZ Datasheet

IC ARM9 SOC ARM920T 272TFBGA

EP9307-CRZ

Manufacturer Part Number
EP9307-CRZ
Description
IC ARM9 SOC ARM920T 272TFBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9307-CRZ

Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
14
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
272-TFBGA
Controller Family/series
(ARM9)
No. Of I/o's
14
Ram Memory Size
32MB
Cpu Speed
200MHz
No. Of Timers
4
No. Of Pwm Channels
1
Digital Ic Case Style
TFBGA
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9307A-Z
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1133 - KIT DEVELOPMENT EP9307 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1138

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9307-CRZ
Manufacturer:
ALTERA
0
Part Number:
EP9307-CRZ
Manufacturer:
CIRRUS
Quantity:
20 000
Part Number:
EP9307-CRZ/E2
Manufacturer:
CIRRUS
Quantity:
20 000
Part Number:
EP9307-CRZ/IRZ
Manufacturer:
ALTERA
0
Part Number:
EP9307-CRZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
FEATURES
http://www.cirrus.com
200 MHz ARM920T Processor
MaverickCrunch
MaverickKey
Integrated Peripheral Interfaces
16 Kbyte Instruction Cache
16 Kbyte Data Cache
Linux
100 MHz System Bus
Floating point, integer and signal processing
instructions
Optimized for digital music compression and
decompression algorithms
Hardware interlocks allow in-line coding
32-bit unique ID can be used for DRM compliance
128-bit random ID
32-bit SDRAM Interface up to 4 banks
32/16-bit SRAM/FLASH/ROM
Serial EEPROM Interface
1/10/100 Mbps Ethernet MAC
Three UARTs
Three-port USB 2.0 Full Speed Host (OHCI)
(12 Mbits per second)
IrDA Interface
LCD and Raster Interface with Graphics
Accelerator
®
, Microsoft
IDs
Ethernet MAC
(3) UARTs
Interface
(3) USB
Math Engine
Serial
Audio
Hosts
IrDA
w/
®
Windows
®
12 Channel DMA
MaverickKey
Copyright 2004 Cirrus Logic (All Rights Reserved)
CE enabled MMU
Flash I/F
SRAM &
ROM
Boot
MEMORY AND STORAGE
TM
D-Cache
SDRAM I/F
MaverickCrunch
Unified
16KB
Peripheral Bus
ARM920T
MMU
ARM9 SOC with Ethernet, USB,
I-Cache
Internal Peripherals
Package
16KB
Display and Touchscreen
Touchscreen Interface with ADC
8 x 8 Keypad Scanner
One Serial Peripheral Interface (SPI) Port
6-channel or 2-channel Serial Audio Interface (I
2-channel low-cost Serial Audio Interface (AC'97)
12 Direct Memory Access (DMA) Channels
Real-time Clock with software Trim
Dual PLL controls all clock domains
Watchdog Timer
Two general purpose 16-bit timers
One general purpose 32-bit timer
One 40-bit Debug Timer
Interrupt Controller
Boot ROM
272 pin TFBGA
TM
Video/LCD
Controller
Bridge
Bus
EP9307 Data Sheet
Accelerator
Processor Bus
Graphic
Interrupts
Screen I/F
Keypad &
Clocks &
& GPIO
Timers
Touch
DS667PP3
AUG ‘04
2
S)
1

Related parts for EP9307-CRZ

EP9307-CRZ Summary of contents

Page 1

... SRAM & SDRAM I/F Flash I/F MEMORY AND STORAGE Copyright 2004 Cirrus Logic (All Rights Reserved) EP9307 Data Sheet Touchscreen Interface with ADC Keypad Scanner One Serial Peripheral Interface (SPI) Port 6-channel or 2-channel Serial Audio Interface (I 2-channel low-cost Serial Audio Interface (AC'97) ...

Page 2

... Industrial computers • Specialized terminals • Point of sale terminals • Test and measurement equipment The EP9307 is one of a series of ARM920T-based devices. The ARM920T microprocessor core with separate 16 Kbyte, 64-way set-associative instruction and data caches is augmented by the MaverickCrunch™ co- processor enabling high-speed calculations. ™ ...

Page 3

... LCD Interface ADC ........................................................................................................................... 37 JTAG .......................................................................................................................... 38 272 Pin TFBGA Package Outline ...................................................................39 272 TFBGA Diagram ................................................................................................. 39 272 Pin TFBGA Pinout (Bottom View) ....................................................................... 40 Acronyms and Abbreviations ........................................................................47 Units of Measurement .....................................................................................47 ORDERING INFORMATION ............................................................................48 DS667PP3 ARM9 SOC with Ethernet, USB, Display and Touchscreen .......................................................................................................... 36 Copyright 2004 Cirrus Logic (All Rights Reserved) EP9307 3 ...

Page 4

... EP9307 ARM9 SOC with Ethernet, USB, Display and Touchscreen List of Figures Figure 1. Timing Diagram Drawing Key ................................................................................. 14 Figure 2. SDRAM Load Mode Register Cycle Timing Measurement ..................................... 15 Figure 3. SDRAM Burst Read Cycle Timing Measurement ................................................... 16 Figure 4. SDRAM Burst Write Cycle Timing Measurement ................................................... 17 Figure 5. SDRAM Auto Refresh Cycle Timing Measurement ................................................ 18 Figure 6 ...

Page 5

... Table P. Reset and Power Management Pin Assignments ................................................... 11 Table Q. Hardware Debug Interface ...................................................................................... 11 Table R. 272 Pin Diagram Dimensions .................................................................................. 40 Table S. Pin Descriptions ..................................................................................................... 44 Table T. Pin Multiplex Usage Information ............................................................................. 46 DS667PP3 ARM9 SOC with Ethernet, USB, Display and Touchscreen Copyright 2004 Cirrus Logic (All Rights Reserved) EP9307 5 ...

Page 6

... EP9307 through the use of laser probing technology. These IDs can then be used to match secure copyrighted content with the ID of the target device the EP9307 is powering, and then deliver the copyrighted information over a secure connection. In addition, secure transactions can benefit by also matching device IDs to server IDs. MaverickKey IDs provide a level of hardware security required for today’ ...

Page 7

... SPI Serial Input I2S Serial Output SPI Serial Output (No I2S Master Clock) AC'97 Reset I2S Master Clock AC'97 Bit Clock I2S Serial Clock AC'97 Frame I2S Frame Clock Clock AC'97 Serial Input I2S Serial Input AC'97 Serial I2S Serial Output Output EP9307 Mode 7 ...

Page 8

... Composite Blank BRIGHT Pulse Width Modulated Brightness Graphics Accelerator The EP9307 contains a hardware graphics acceleration engine that improves graphic performance by handling block copy, block fill and hardware line draw operations. The Graphics Accelerator is used in the system to off- load graphics operations from the processor. ...

Page 9

... Copyright 2004 Cirrus Logic (All Rights Reserved) Table I. Triple Port USB Host Pin Assignments Pin Name - Description USB Positive signals USB Negative Signals Pin Name - Description EEPROM / Two-Wire General Interface Clock Purpose I/O EEPROM / Two-Wire General Interface Data Purpose I/O EP9307 Alternative Usage 9 ...

Page 10

... EP9307 ARM9 SOC with Ethernet, USB, Display and Touchscreen Real-Time Clock with Software Trim The software trim feature on the real time clock (RTC) provides software controlled digital compensation of the 32.768 KHz crystal oscillator. This compensation is accurate to ±1.24 sec/month. Table K. Real-Time Clock with Pin Assignments ...

Page 11

... DMA channel, source and destination addressing can be independently programmed to increment, DS667PP3 ARM9 SOC with Ethernet, USB, Display and Touchscreen decrement, or stay at the same value. All DMA addresses are physical, not virtual addresses. Two of these are be used Copyright 2004 Cirrus Logic (All Rights Reserved) EP9307 11 ...

Page 12

... EP9307 ARM9 SOC with Ethernet, USB, Display and Touchscreen Electrical Specifications Absolute Maximum Ratings (All grounds = 0 V, all voltages with respect Power Supplies Total Power Dissipation Input Current per Pin, DC (Except supply pins) Output current per pin, DC Digital Input voltage Storage temperature Note: 1 ...

Page 13

... RVDD CVDD/VDD_PLL Total RVDD Copyright 2004 Cirrus Logic (All Rights Reserved) Symbol Min Max 0.85 × RVDD 0.15 × RVDD 0.65 × RVDD V VDD + 0.3 ih −0.3 0.35 × RVDD -10 il Min Typ Max - 200 - - 2 1.0 - EP9307 Unit µA µA Unit Table ...

Page 14

... EP9307 ARM9 SOC with Ethernet, USB, Display and Touchscreen Timings Timing Diagram Conventions This data sheet contains one or more timing diagrams. The following key explains the components used in these diagrams. Any variations are clearly labelled when they occur. Therefore, no additional meaning should be attached unless specifically stated ...

Page 15

... AD DA Figure 2. SDRAM Load Mode Register Cycle Timing Measurement DS667PP3 ARM9 SOC with Ethernet, USB, Display and Touchscreen Symbol t clk_high t clk_low t clkrf DQd t DQh t DAs t DAh OP-Code Copyright 2004 Cirrus Logic (All Rights Reserved) EP9307 Min Typ Max Unit (t )/ HCLK (t )/ HCLK - ...

Page 16

... EP9307 ARM9 SOC with Ethernet, USB, Display and Touchscreen SDRAM Burst Read Cycle SDCLK t d SDCSn RASn CASn SDWEn t DQd DQMn clk_low DAs DAh Figure 3. SDRAM Burst Read Cycle Timing Measurement Copyright 2004 Cirrus Logic (All Rights Reserved) t clk_high t clkrf t DQh ...

Page 17

... SDRAM Burst Write Cycle SDCLK t d SDCSn RASn CASn SDWEn DQMn AD DA DS667PP3 ARM9 SOC with Ethernet, USB, Display and Touchscreen t clk_low t h Figure 4. SDRAM Burst Write Cycle Timing Measurement Copyright 2004 Cirrus Logic (All Rights Reserved) EP9307 t clk_high t clkrf ...

Page 18

... EP9307 ARM9 SOC with Ethernet, USB, Display and Touchscreen SDRAM Auto Refresh Cycle SDCLK SDCSn RASn CASn SDWEn Note: Chip select shown as bus to illustrate multiple devices being put into auto refresh in one access 18 t clk_low Figure 5. SDRAM Auto Refresh Cycle Timing Measurement ...

Page 19

... ARM9 SOC with Ethernet, USB, Display and Touchscreen Symbol Min t - ADs t - ADh t - RDpw t - RDd t - RDh t - DQMd t - DQMh t - DAs t 0 DAh t ADs t R Dd1 QMd1 Copyright 2004 Cirrus Logic (All Rights Reserved) Typ Max 5 - × HCLK × (WST1 + 2) × HCLK HCLK HCLK Dd2 QMd2 t DAs EP9307 Unit DAh 19 ...

Page 20

... EP9307 ARM9 SOC with Ethernet, USB, Display and Touchscreen Static Memory Single Word Write Cycle Parameter AD setup to WRn assert time AD hold from WRn deassert time WRn deassert to CSn deassert time CSn to WRn assert delay time WRn assert time CSn to DQMn assert delay time ...

Page 21

... DAh1 t - DAh2 t t AD2 PwL t t DAh1 D Ah1 Copyright 2004 Cirrus Logic (All Rights Reserved) Typ Max t - HCLK × (WST1 + 1) - × (WST1 + 1) - × (WST1 + 1) - × (WST1 + 2) - × HCLK × (4 × WST1 + HCLK QMh t DAh Ah2 1 t DAs1 EP9307 Unit ADh t DAs2 21 ...

Page 22

... EP9307 ARM9 SOC with Ethernet, USB, Display and Touchscreen Static Memory 32-bit Write on 8-bit External Bus Parameter AD setup to WRn assert time WRn deassert to AD transition time AD hold from WRn deassert time CSn hold from WRn deassert time CSn to WRn assert delay time ...

Page 23

... DQMh t - DAs1 t - DAs2 t - DAh1 t - DAh2 t ADd1 t RDpwl t DQMd t t DAs1 DAh1 Copyright 2004 Cirrus Logic (All Rights Reserved) Typ Max t - HCLK × (WST1 + 1) - HCLK × (WST1 + 2) - HCLK × HCLK × (2 × WST1 + HCLK ADd2 t RDh t DQMh t DAs2 EP9307 Unit ADh t DAh2 23 ...

Page 24

... EP9307 ARM9 SOC with Ethernet, USB, Display and Touchscreen Static Memory 32-bit Write on 16-bit External Bus Parameter AD setup to WRn assert time WRn deassert to AD transition time AD hold from WRn deassert time CSn hold from WRn deassert time CSn to WRn assert delay time ...

Page 25

... Copyright 2004 Cirrus Logic (All Rights Reserved) Typ × (WST1 + 1) t HCLK × (WST2 + 1) t HCLK × HCLK × ((WST1 + 1) + 4(WST2 + 1)) 0 × ((WST1 + 1) + 4(WST2 + 1)) 4 × ((WST1 + 1) + 4(WST2 + 1 HCLK ADd2 ADh t CSpw t RDpw DQMpw t t DAh1 DAh1 t t DAs1 DAs2 EP9307 Max Unit - DAh2 25 ...

Page 26

... EP9307 ARM9 SOC with Ethernet, USB, Display and Touchscreen Static Memory Single Read Wait Cycle Parameter CSn assert to WAIT time WAIT assert time WAIT to CSn deassert delay time AD CSn WRn RDn DQMn DA WAIT Figure 13. Static Memory Single Read Wait Cycle Timing Measurement ...

Page 27

... ARM9 SOC with Ethernet, USB, Display and Touchscreen Symbol Min × WRd HCLK t - WAITd × WAITpw HCLK × CSnd HCLK t W AITd t W AITpw Copyright 2004 Cirrus Logic (All Rights Reserved) Typ Max × HCLK × (WST1 - HCLK × 510 t - HCLK × HCLK CSnd EP9307 Unit ...

Page 28

... EP9307 ARM9 SOC with Ethernet, USB, Display and Touchscreen Static Memory Turnaround Cycle Parameter CSnX deassert to CSnY assert time Note: X and Y represent any two chip select numbers CSn0 CSn1 Y WRn RDn DQMn DA WAIT Figure 15. Static Memory Turnaround Cycle Timing Measurement 28 Symbol ...

Page 29

... MDC_high t 160 160 MDC_low MDCrf MDIOs MDIOh MDIOd Copyright 2004 Cirrus Logic (All Rights Reserved) Typ Max 10 Mbit 100 Mbit 10 Mbit 100 Mbit mode mode mode mode 400 200 20 260 26 200 20 260 400 200 20 260 26 200 20 260 300 300 EP9307 Unit ...

Page 30

... EP9307 ARM9 SOC with Ethernet, USB, Display and Touchscreen TXCLK t MII_TXD[3:0]/ TXEN/ TXERR RXCLK MII_RXD[3:0]/ RXDVAL/ RXERR MDC t MDC_high MDIO t (Sourced MDC_per by STA) MDC MDIO (Sourced by PHY TX_high TX_low t TXd TX_per t RXrf t RXh t RXs t MDCrf t MDC_low t MDIOd Figure 16. Ethernet MAC Timing Measurement ...

Page 31

... Note: tspix_clk is programmable by the user. DS667PP3 ARM9 SOC with Ethernet, USB, Display and Touchscreen Symbol t clk_per t clk_high t clk_low t clkrf t DMd t DMs t DMh t DSd t DSs t DSh Copyright 2004 Cirrus Logic (All Rights Reserved) Min Typ Max - tspix_clk - - (tspix_clk)/ (tspix_clk)/ 4 EP9307 Unit ...

Page 32

... EP9307 ARM9 SOC with Ethernet, USB, Display and Touchscreen Texas Instruments’ Synchronous Serial Format t clk_per t clk_high SCLK SFRM SSPTXD/ MSB SSPRXD Microwire clk_high clk_per clkrf SCLK t clk_low SFRM MSB SSPTXD 8-bit control SSPRXD 32 t clkrf t clk_low LSB bits Figure 17. SPI Single Transfer Timing Measurement ...

Page 33

... DMd t t DSd DSs SSPRXD MSB from slave SFRM DS667PP3 ARM9 SOC with Ethernet, USB, Display and Touchscreen t clk_per t clk_low t DMh t DSd Figure 19. SPI Format with SPH=1 Timing Measurement Copyright 2004 Cirrus Logic (All Rights Reserved) t clkrf LSB LSB EP9307 33 ...

Page 34

... EP9307 ARM9 SOC with Ethernet, USB, Display and Touchscreen 2 Inter-IC Sound - I S Parameter SCLK cycle time SCLK high time SCLK low time SCLK rise/fall time SCLK to LRCLK assert delay time LRCLK from SCLK assert hold time SDI to SCLK deassert setup time ...

Page 35

... ARM9 SOC with Ethernet, USB, Display and Touchscreen Symbol t clk_per t clk_high t clk_low = clk_high t clk_low t f clkrf fout fout rfout t t rout rfout Figure 21. AC ‘97 Configuration Timing Measurement Copyright 2004 Cirrus Logic (All Rights Reserved) Min Typ Max - 81 clkr clkf rfin rout fout t rfin fout rfout EP9307 Unit ...

Page 36

... EP9307 ARM9 SOC with Ethernet, USB, Display and Touchscreen LCD Interface Parameter SPCLK rising time SPCLK falling time SPCLK rising edge to control signal transition time SPCLK rising edge to data transition time SPCLK falling edge to control signal transition time SPCLK falling edge to data transition time ...

Page 37

... Vref/2 A/D Converter Transfer Function (approximately ±25,000 counts) Figure 23. ADC Transfer Function Copyright 2004 Cirrus Logic (All Rights Reserved) Value Units 50K counts (approximate) 0.01% ±15 0.2% 3750 Samples per second 925 Samples per second 500 2 120 Vref EP9307 mV µs ms µV 37 ...

Page 38

... EP9307 ARM9 SOC with Ethernet, USB, Display and Touchscreen JTAG Parameter TCK clock period TCK clock high time TCK clock low time TMS/TDI to clock rising setup time Clock rising to TMS/TDI hold time JTAG port clock to output JTAG port high impedance to valid output ...

Page 39

... Pin TFBGA Package Outline 272 TFBGA Diagram DS667PP3 ARM9 SOC with Ethernet, USB, Display and Touchscreen Figure 25. 272 Pin TFBGA Diagram 0.600 REF Copyright 2004 Cirrus Logic (All Rights Reserved) EP9307 39 ...

Page 40

... EP9307 ARM9 SOC with Ethernet, USB, Display and Touchscreen Symbol ddd Note: 1. Controlling Dimension: Millimeter. 2. Primary Datum C and seating plane are defined by the spherical crowns of the solder balls. 3. Dimension b is measured at the maximum solder ball diameter, parallel to Primary Datum C. 4. There shall be a minimum clearance of 0.25 mm between the edge of the solder ball and the body edge. ...

Page 41

P[8] P[4] P[ V_CSYNC P[7] P[2] R P[9] HSYNC P[6] P[5] P[0] P SPCLK P[10] P[11] P[3] AD[15] N P[14] P[16] P[15] P[13] P[12] M BRIGHT AD[0] DQMn[1] DQMn[2] ...

Page 42

... EP9307 ARM9 SOC with Ethernet, USB, Display and Touchscreen Pin List The following Thin-profile Fine-pitch Ball Grid Array (TFBGA) ball assignment table is sorted in order of ball. Ball Signal Ball A1 CSn[1] A2 CSn[7] A3 SDCLKEN A4 DA[31] A5 DA[29] A6 DA[27] A7 HGPIO[2] A8 RDn A9 MIIRXD[3] A10 RXDVAL A11 MIITXD[1] ...

Page 43

... ROW[2] T17 NC P[14 P[16 P[15] U3 P[8] P[13] U4 P[4] P[12] U5 P[1] DA[5] U6 DA[6] vddr U7 DA[3] vddr U8 AD[10] vddr U9 DA[0] vddr U10 TDO EECLK U11 NC ASDO U12 SCLK[1] CTSn U13 SSPRX[1] RXD[0] U14 INT[1] TXD[0] U15 RTSn TXD[1] U16 USBm[1] TXD[2] U17 NC EP9307 43 ...

Page 44

... The second table (Table signal multiplexing and configuration options. Table summary of the EP9307 pin signals, which illustrates the pad type and pad pull type (if any). The symbols used in the table are defined as follows. (Note: A blank box means Not Applicable (NA) or, for Pull Type, No Pull (NP) ...

Page 45

... HGPIO[7:2] GPIO I/O, 8ma PU GPIO vddc Power P - Digital power, 1.8V vddr Power P - Digital power, 3.3V gndc Ground G - Digital ground gndr Ground G - Digital ground DS667PP3 ARM9 SOC with Ethernet, USB, Display and Touchscreen Description Copyright 2004 Cirrus Logic (All Rights Reserved) EP9307 45 ...

Page 46

... EP9307 ARM9 SOC with Ethernet, USB, Display and Touchscreen Table T illustrates the pin signal multiplexing and configuration options. Physical Pin Name COL[7:0] ROW[7:0] EGPIO[0] EGPIO[1] EGPIO[2] EGPIO[3] EGPIO[4] EGPIO[5] EGPIO[6] EGPIO[7] EGPIO[8] EGPIO[9] EGPIO[10] EGPIO[11] EGPIO[12] EGPIO[13] EGPIO[15] ABITCLK ASYNC ASDO ...

Page 47

... Celsius Hertz = cycle per second Kilobits per second Kilobyte KiloHertz = 1000 Hz Megabits per second MegaHertz = 1,000 KiloHertz -6 microAmpere = 10 Ampere microsecond = 1,000 nanoseconds = 10 -3 milliAmpere = 10 Ampere millisecond = 1,000 microseconds = 10 -3 milliWatt = 10 Watts -9 nanosecond = 10 seconds -12 picoFarad = 10 Farads Volt Watt EP9307 -6 seconds -3 seconds 47 ...

Page 48

... EP9307 ARM9 SOC with Ethernet, USB, Display and Touchscreen ORDERING INFORMATION The order numbers for the device are: EP9307-CR EP9307-CRZ -40 ° +85 ° C EP9307-IR -40 ° +85 ° C EP9307-IRZ EP9307 — CRZ Part Number Product Line: Embedded Processor Note the Cirrus Logic Internet site at http://www.cirrus.com to find contact information for your local sales representative. ...

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