C8051F413-GM Silicon Laboratories Inc, C8051F413-GM Datasheet - Page 105

• Manufacturer Part Number: C8051F413-GM
• Description: IC 8051 MCU 16K FLASH 28QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F41xr

Specifications of C8051F413-GM

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 28-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 20
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.25 V
• Data Converters: A/D 20x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F4x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: I2C/SMBus/SPI/UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 20
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F410DK
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 2-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1454 - ADAPTER PROGRAM TOOLSTICK F411336-1317 - KIT EVAL FOR C8051F411336-1314 - KIT DEV FOR C8051F41X
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1311

D8
D0
C8
C0
F8
F0
E8
E0
B8
B0
A8
A0
98
90
88
80
11.6. Special Function Registers
The direct-access data memory locations from 0x80 to 0xFF constitute the special function registers
(SFRs). The SFRs provide control and data exchange with the CIP-51's resources and peripherals. The
CIP-51 duplicates the SFRs found in a typical 8051 implementation as well as implementing additional
SFRs used to configure and access the sub-systems unique to the MCU. This allows the addition of new
functionality while retaining compatibility with the MCS-51™ instruction set. Table 11.1 lists the SFRs
implemented in the CIP-51 System Controller.
The SFR registers are accessed anytime the direct addressing mode is used to access memory locations
from 0x80 to 0xFF. SFRs with addresses ending in 0x0 or 0x8 (e.g. P0, TCON, IE, etc.) are bit-addressable
as well as byte-addressable. All other SFRs are byte-addressable only. Unoccupied addresses in the SFR
space are reserved for future use. Accessing these areas will have an indeterminate effect and should be
avoided. Refer to the corresponding pages of the data sheet, as indicated in Table 11.2, for a detailed
description of each register.
(bit addressable)
TMR2CN
SMB0CN
ADC0CN
PCA0CN
P0ODEN
SPI0CN
SCON0
TCON
PSW
ACC
0(8)
P2
P1
P0
IP
IE
B
Table 11.1. Special Function Register (SFR) Memory Map
PCA0CPL1 PCA0CPH1 PCA0CPL2 PCA0CPH2 PCA0CPL3 PCA0CPH3 RSTSRC
OSCXCN
SPI0CFG
PCA0MD PCA0CPM0 PCA0CPM1 PCA0CPM2 PCA0CPM3 PCA0CPM4 CRC0FLIP
REG0CN
SMB0CF
TMR3CN
REF0CN
CLKSEL
P0MDIN
IDA0CN
PCA0L
SBUF0
TMOD
XBR0
1(9)
SP
PCA0CPL5 PCA0CPH5
TMR2RLL TMR2RLH
SMB0DAT ADC0GTL ADC0GTH
TMR3RLL TMR3RLH
SPI0CKR
ADC0TK
CPT1CN
OSCICN
P1MDIN
EMI0CN
PCA0H
XBR1
DPL
2(A)
TL0
PCA0CPL0 PCA0CPH0 PCA0CPL4 PCA0CPH4 VDM0CN
ADC0MX
SPI0DAT
CLKMUL
CPT0CN
PFE0CN
P2MDIN
OSCICL
DPH
3(B)
TL1
Rev. 1.1
P0MDOUT P1MDOUT P2MDOUT
RTC0ADR RTC0DAT
CPT1MD
CRC0CN
ADC0CF
P0SKIP
IT01CF
TMR2L
TMR3L
IDA1L
4(C)
TH0
ADC0LTL
CPT0MD
C8051F410/1/2/3
CRC0IN
IDA1CN
P1SKIP
TMR2H
TMR3H
ADC0L
IDA1H
TH1
5(D)
PCA0CPM5
CRC0DAT
RTC0KEY ONESHOT
ADC0LTH
CPT1MX
CKCON
P2SKIP
ADC0H
FLSCL
IDA0L
EIP1
EIE1
6(E)
P0MASK
P1MASK
CPT0MX
P0MAT
P1MAT
FLKEY
PSCTL
IDA0H
PCON
EIP2
EIE2
7(F)
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