C8051F413-GM Silicon Laboratories Inc, C8051F413-GM Datasheet - Page 186

• Manufacturer Part Number: C8051F413-GM
• Description: IC 8051 MCU 16K FLASH 28QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F41xr

Specifications of C8051F413-GM

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 28-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 20
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.25 V
• Data Converters: A/D 20x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F4x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: I2C/SMBus/SPI/UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 20
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F410DK
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 2-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1454 - ADAPTER PROGRAM TOOLSTICK F411336-1317 - KIT EVAL FOR C8051F411336-1314 - KIT DEV FOR C8051F41X
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1311

C8051F410/1/2/3
The following steps can be used to read the current timer value:
20.3.2. Setting a smaRTClock Alarm
The smaRTClock Alarm function compares the 47-bit value of smaRTClock Timer to the value of the
ALARMn registers. An alarm event is triggered if the smaRTClock timer is greater than or equal to the
ALARMn registers. If the smaRTClock Interrupt is enabled, the CIP-51 will vector to the smaRTClock Inter-
rupt Service Routine when an alarm event occurs. If smaRTClock is enabled as a reset source, the MCU
will be reset when an alarm event occurs. Also, the internal oscillator will awaken from suspend mode on a
smaRTClock alarm event.
The following steps can be used to set up a smaRTClock Alarm:
Note: When an alarm event occurs and smaRTClock interrupts are enabled, software should clear the
ALRM bit and set the ALARM5-0 registers to the maximum possible value to avoid continuous alarm inter-
rupts.
186
smaRTClock Addresses: CAPTURE0: 0x00; CAPTURE1: 0x01; CAPTURE2: 0x02; CAPTURE3: 0x03; CAPTURE4: 0x04; CAPTURE5:
0x05
Note: These registers are not SFRs. They can only be accessed indirectly through RTC0ADR and RTC0DAT.
Bits 7–0: CAPTUREn: smaRTClock Set/Capture Value.
Note: The LSB of CAPTURE0 is not used. The LSB of the 47-bit smaRTClock timer will appear in
R/W
Bit7
Internal Register Definition 20.6. CAPTUREn: smaRTClock Timer Capture
Step 1. Write ‘1’ to RTC0CAP. This will transfer the contents of the timer to the CAPTUREn
Step 2. Poll RTC0CAP until it is cleared to ‘0’ by hardware.
Step 3. A snapshot of the timer value can be read from the CAPTUREn registers
Step 1. Disable smaRTClock Alarm Events (RTC0AEN = 0).
Step 2. Set the ALARMn registers to the desired value.
Step 3. Enable smaRTClock Alarm Events (RTC0AEN = 1).
These 6 registers (CAPTURE5–CAPTURE0) are used to read or set the 47-bit smaRTClock
timer. Data is transferred to or from the smaRTClock timer when the RTC0SET or RTC0CAP
bits are set. 
CAPTURE0.1.
registers (the LSB of the smaRTClock timer will be found in CAPTURE0.1).
R/W
Bit6
R/W
Bit5
R/W
Bit4
Rev. 1.1
R/W
Bit3
R/W
Bit2
R/W
Bit1
R/W
Bit0
Reset Value
11111111