C8051F413-GM Silicon Laboratories Inc, C8051F413-GM Datasheet - Page 157

IC 8051 MCU 16K FLASH 28QFN

C8051F413-GM

Manufacturer Part Number
C8051F413-GM
Description
IC 8051 MCU 16K FLASH 28QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F41xr
Datasheets

Specifications of C8051F413-GM

Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
28-QFN
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
20
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.25 V
Data Converters
A/D 20x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F4x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2.25 KB
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
20
Number Of Timers
4
Operating Supply Voltage
2 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F410DK
Minimum Operating Temperature
- 40 C
On-chip Dac
2-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1454 - ADAPTER PROGRAM TOOLSTICK F411336-1317 - KIT EVAL FOR C8051F411336-1314 - KIT DEV FOR C8051F41X
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1311

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Bits7–0: P0MAT[7:0]: Port0 Match Value.
Bits7–0: P0MASK[7:0]: Port0 Mask Value.
Bits7–0: High Impedance Overdrive Mode Enable Bits for P0.7–P0.0 (respectively).
R/W
R/W
R/W
Bit7
Bit7
Bit7
These bits control the value that unmasked P0 Port pins are compared against. A Port
Match event is generated if (P0 & P0MASK) does not equal (P0MAT & P0MASK).
These bits select which Port pins will be compared to the value stored in P0MAT.
0: Corresponding P0.n pin is ignored and cannot cause a Port Match event.
1: Corresponding P0.n pin is compared to the corresponding bit in P0MAT.
Port pins configured to High-Impedance Overdrive Mode do not require additional overdrive
current, although selecting this mode results in a slight increase in supply current. Port pins
configured to Normal Overdrive Mode require approximately 150 µA of input overdrive cur-
rent when the voltage at the pin reaches V
0: Corresponding P0.n pin is configured to Normal Overdrive Mode.
1: Corresponding P0.n pin is configured to High-Impedance Overdrive Mode.
R/W
R/W
R/W
Bit6
Bit6
Bit6
SFR Definition 18.9. P0ODEN: Port0 Overdrive Mode
SFR Definition 18.8. P0MASK: Port0 Mask
SFR Definition 18.7. P0MAT: Port0 Match
R/W
R/W
R/W
Bit5
Bit5
Bit5
R/W
R/W
R/W
Bit4
Bit4
Bit4
Rev. 1.1
R/W
R/W
R/W
Bit3
Bit3
Bit3
IO
+0.7 V.
R/W
R/W
R/W
Bit2
Bit2
Bit2
C8051F410/1/2/3
R/W
R/W
R/W
Bit1
Bit1
Bit1
SFR Address:
SFR Address:
SFR Address:
R/W
R/W
Bit0
R/W
Bit0
Bit0
0xD7
0xB0
0xC7
00000000
Reset Value
Reset Value
00000000
Reset Value
11111111
157

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