C8051F413-GM Silicon Laboratories Inc, C8051F413-GM Datasheet - Page 56

• Manufacturer Part Number: C8051F413-GM
• Description: IC 8051 MCU 16K FLASH 28QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F41xr

Specifications of C8051F413-GM

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 28-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 20
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.25 V
• Data Converters: A/D 20x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F4x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: I2C/SMBus/SPI/UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 20
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F410DK
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 2-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1454 - ADAPTER PROGRAM TOOLSTICK F411336-1317 - KIT EVAL FOR C8051F411336-1314 - KIT DEV FOR C8051F41X
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1311

C8051F410/1/2/3
5.3.4. Burst Mode
Burst Mode is a power saving feature that allows ADC0 to remain in a low power state between conver-
sions. When Burst Mode is enabled, ADC0 wakes from a low power state, accumulates 1, 4, 8, or 16 sam-
ples using an internal Burst Mode clock (approximately 25 MHz), then re-enters a low power state. Since
the Burst Mode clock is independent of the system clock, ADC0 can perform multiple conversions then
enter a low power state within a single system clock cycle, even if the system clock is slow (e.g.
32.768 kHz), or suspended.
Burst Mode is enabled by setting BURSTEN to logic 1. When in Burst Mode, AD0EN controls the ADC0
idle power state (i.e. the state ADC0 enters when not tracking or performing conversions). If AD0EN is set
to logic 0, ADC0 is powered down after each burst. If AD0EN is set to logic 1, ADC0 remains enabled after
each burst. On each convert start signal, ADC0 is awakened from its Idle Power State. If ADC0 is powered
down, it will automatically power up and wait the programmable Power-Up Time controlled by the
AD0PWR bits. Otherwise, ADC0 will start tracking and converting immediately. Figure 5.5 shows an exam-
ple of Burst Mode Operation with a slow system clock and a repeat count of 4.
Important Note: When Burst Mode is enabled, only Post-Tracking and Dual-Tracking modes can be used.
When Burst Mode is enabled, a single convert start will initiate a number of conversions equal to the repeat
count. When Burst Mode is disabled, a convert start is required to initiate each conversion. In both modes,
the ADC0 End of Conversion Interrupt Flag (AD0INT) will be set after “repeat count” conversions have
been accumulated. Similarly, the Window Comparator will not compare the result to the greater-than and
less-than registers until “repeat count” conversions have been accumulated.
Note: When using Burst Mode, care must be taken to issue a convert start signal no faster than once every
four SYSCLK periods. This includes external convert start signals.
56
D u a l-T ra ckin g
D u a l-T ra ckin g
P o st-T ra ckin g
P o st-T ra ckin g
S yste m C lo ck
C o n ve rt S ta rt
A D 0 T M = 0 1
A D 0 T M = 1 1
A D 0 T M = 0 1
A D 0 T M = 1 1
A D 0 E N = 0
A D 0 E N = 0
A D 0 E N = 1
A D 0 E N = 1
Figure 5.5. 12-Bit ADC Burst Mode Example with Repeat Count Set to 4
T = T ra ckin g
C = C o n ve rtin g
P o w e re d
P o w e re d
D o w n
D o w n
T ra ck
Id le
T C
T C
P o w e r-U p
P o w e r-U p
a n d T ra ck
A D 0 P W R
a n d Id le
T C
T C
T C
T C
T C
T C
T C
T C
T C
T C
Rev. 1.1
T C
T C
T C
T C
T ra ck
Id le
P o w e re d
P o w e re d
D o w n
D o w n
T C
T C
P o w e r-U p
P o w e r-U p
a n d T ra ck
a n d Id le
T C
T C
T C ..
T C ..
T C ..
T C ..