ATMEGA169L-8MI Atmel, ATMEGA169L-8MI Datasheet - Page 135

• Manufacturer Part Number: ATMEGA169L-8MI
• Description: IC MCU AVR 16K LV 8MHZ IND 64QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA169L-8MI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• For Use With: ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: ATMEGA169L-4MI; ATMEGA169L-4MI

8-bit Timer/Counter
Register Description
Timer/Counter Control
Register A– TCCR2A
2514H–AVR–05/03
• Bit 7 – FOC2A: Force Output Compare A
The FOC2A bit is only active when the WGM bits specify a non-PWM mode. However,
for ensuring compatibility with future devices, this bit must be set to zero when TCCR2A
is written when operating in PWM mode. When writing a logical one to the FOC2A bit,
an immediate compare match is forced on the Waveform Generation unit. The OC2A
output is changed according to its COM2A1:0 bits setting. Note that the FOC2A bit is
implemented as a strobe. Therefore it is the value present in the COM2A1:0 bits that
determines the effect of the forced compare.
A FOC2A strobe will not generate any interrupt, nor will it clear the timer in CTC mode
using OCR2A as TOP.
The FOC2A bit is always read as zero.
• Bit 6, 3 – WGM21:0: Waveform Generation Mode
These bits control the counting sequence of the counter, the source for the maximum
(TOP) counter value, and what type of waveform generation to be used. Modes of oper-
ation supported by the Timer/Counter unit are: Normal mode, Clear Timer on Compare
match (CTC) mode, and two types of Pulse Width Modulation (PWM) modes. See Table
61 and “Modes of Operation” on page 129.
Table 61. Waveform Generation Mode Bit Description
Note:
Bit
Read/Write
Initial Value
Mode
0
1
2
3
1. The CTC2 and PWM2 bit definition names are now obsolete. Use the WGM21:0 def-
WGM21
(CTC2)
initions. However, the functionality and location of these bits are compatible with
previous versions of the timer.
0
0
1
1
FOC2A
W
7
0
WGM20
(PWM2)
WGM20
0
1
0
1
R/W
6
0
Timer/Counter Mode
of Operation
Normal
PWM, Phase Correct
CTC
Fast PWM
COM2A1
R/W
5
0
COM2A0
R/W
4
0
WGM21
R/W
3
0
TOP
0xFF
0xFF
OCR2A
0xFF
(1)
CS22
R/W
ATmega169V/L
2
0
Update of
OCR2A at
Immediate
TOP
Immediate
TOP
CS21
R/W
1
0
CS20
R/W
0
0
TOV2 Flag
Set on
MAX
BOTTOM
MAX
MAX
TCCR2A
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