P89LPC931FDH,112 NXP Semiconductors, P89LPC931FDH,112 Datasheet - Page 47

• Manufacturer Part Number: P89LPC931FDH,112
• Description: IC 80C51 MCU FLASH 8K 28-TSSOP
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC931FDH,112

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-TSSOP
• Processor Series: P89LPC9x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 45 C
• For Use With: 622-1014 - BOARD FOR LPC9XX TSSOP622-1008 - BOARD FOR LPC9103 10-HVSON622-1006 - SOCKET ADAPTER BOARDMCB900K - BOARD PROTOTYPE NXP 89LPC9EPM900K - EMULATOR/PROGRAMMER NXP P89LPC9568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART622-1002 - USB IN-CIRCUIT PROG LPC9XX568-1759 - EMULATOR DEBUGGER/PROGRMMR LPC9X568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-1284-5; 935273877112; P89LPC931FDH; P89LPC931FDH,129; P89LPC931FDH-S

Philips Semiconductors
Table 9:
V
T
9397 750 14472
Product data
Symbol
t
t
t
t
t
t
t
t
t
t
t
SPILEAD
SPILAG
SPICLKH
SPICLKL
SPIDSU
SPIDH
SPIA
SPIDIS
SPIDV
SPIOH
SPIR
amb
DD
= 3.0 V to 3.6 V, unless otherwise specified.
= 40 C to +85 C for industrial, unless otherwise specified.
AC characteristics
Parameter
Enable lead time (Slave)
Enable lag time (Slave)
SPICLK high time
SPICLK low time
Data set-up time (Master or Slave) see Figures
Data hold time (Master or Slave)
Access time (Slave)
Disable time (Slave)
Enable to output data valid
Output data hold time
Rise time
3.0 MHz
3.0 MHz
Master
Slave
Master
Slave
3.0 MHz
3.0 MHz
4.5 MHz
SPI outputs (SPICLK, MOSI,
MISO)
SPI inputs (SPICLK, MOSI,
MISO, SS)
…continued
Rev. 05 — 15 December 2004
Conditions
see Figures
17,
see Figures
17,
see Figures
15, 16, 17,
see Figures
15, 16, 17,
15, 16, 17,
see Figures
15, 16, 17,
see Figures
17,
see Figures
17,
see Figures
15, 16, 17,
see Figures
15, 16, 17,
see Figures
15, 16, 17,
18
18
18
18
18
18
18
18
18
18
18
[1]
8-bit microcontrollers with two-clock 80C51 core
Variable clock
Min
250
250
2
3
2
3
100
100
0
0
0
0
0
-
-
CCLK
CCLK
CCLK
CCLK
Max
-
-
-
-
-
-
-
-
80
160
160
111
-
100
2000
P89LPC930/931
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
f
Min
250
250
111
167
111
167
100
100
0
-
-
-
0
-
-
osc
= 18 MHz
Max
-
-
-
-
-
-
-
-
80
160
160
111
-
100
2000
47 of 55
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns