ST10F272Z2Q3 STMicroelectronics, ST10F272Z2Q3 Datasheet - Page 105

MCU 16BIT 256KB FLASH 144-PQFP

ST10F272Z2Q3

Manufacturer Part Number
ST10F272Z2Q3
Description
MCU 16BIT 256KB FLASH 144-PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F272Z2Q3

Core Processor
ST10
Core Size
16-Bit
Speed
64MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-5579

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ST10F272Z2
Table 50.
1. It can degenerate into a Long Hardware Reset and consequently differently flagged (see
2. When Bidirectional is active (and with RPD=0), it can be followed by a Short Hardware Reset and consequently differently
Table 51.
X: Pin is sampled
-: Pin is not sampled
Software Reset
Watchdog Reset
Synchronous Short Hardware Reset
Synchronous Long Hardware Reset
Asynchronous Hardware Reset
Asynchronous Power-On Reset
Watchdog Reset
Software Reset
flagged (see
Event
Reset event (continued)
The start-up configurations and some system features are selected on reset sequences as
described in
Table 51
reset modes.
BUSCON0 registers.
PORT0 latched configuration for the different reset events
Section 20.6
Sample event
(2)
(2)
x
x
0
1
x
x
0
1
describes what is the system configuration latched on PORT0 in the six different
for details).
0
0
1
1
0
0
1
1
Table 51
Figure 35
N Synch.
N Synch.
N Synch.
N Synch.
Y Synch.
Y Synch.
Y Synch.
Y Synch.
and
summarizes the state of bits of PORT0 latched in RP0H, SYSCON,
Figure
X
X
X
-
-
-
Activated by internal logic for 1024 TCL
Activated by internal logic for 1024 TCL
35.
X
X
X
-
-
-
min
X
X
X
-
-
-
X
X
X
X
X
X
Not activated
Not activated
Not activated
Not activated
Not activated
Not activated
X
X
X
X
X
X
RSTIN
X
X
X
X
X
X
X
X
X
X
X
X
PORT0
X
X
X
X
X
X
max
Section 20.3
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
-
-
for details).
0
0
X
X
X
X
0
0
0
0
0
0
-
-
WDTCON Flags
0
0
0
0
0
0
0
0
X
X
X
X
System reset
-
-
X
X
X
X
0
0
0
0
0
0
0
0
-
-
105/189
X
X
X
X
1
1
1
1
1
1
1
1
-
-
X
X
X
X
0
0
0
0
1
1
1
1
-
-

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