DF2266TF13V Renesas Electronics America, DF2266TF13V Datasheet - Page 290
DF2266TF13V
Manufacturer Part Number
DF2266TF13V
Description
IC H8S/2266 MCU FLASH 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet
1.DF2266TF20V.pdf
(712 pages)
Specifications of DF2266TF13V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
13MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Section 10 16-Bit Timer Pulse Unit (TPU)
10.6
There are three kinds of TPU interrupt source for the H8S/2268 Group; TGR input
capture/compare match, TCNT overflow, and TCNT underflow. There are two kinds of TPU
interrupt source for the H8S/2264 Group; TGR input capture/compare match and TCNT overflow.
Each interrupt source has its own status flag and enable/disabled bit, allowing the generation of
interrupt request signals to be enabled or disabled individually.
When an interrupt request is generated, the corresponding status flag in TSR is set to 1. If the
corresponding enable/disable bit in TIER is set to 1 at this time, an interrupt is requested. The
interrupt request is cleared by clearing the status flag to 0.
In the H8S/2268 Group, relative channel priorities can be changed by the interrupt controller,
however the priority order within a channel is fixed. For details, see section 5, Interrupt Controller.
Table 10.24 lists the TPU interrupt sources.
Table 10.24 TPU Interrupts
Note: * Supported only by the H8S/2268 Group.
Rev. 5.00 Sep. 01, 2009 Page 238 of 656
REJ09B0071-0500
Channel Name
0 *
1
2
TGI0A
TGI0B
TGI0C
TGI0D
TCI0V
TGI1A
TGI1B
TCI1V
TCI1U *
TGI2A
TGI2B
TCI2V
TCI2U *
Interrupt Sources
Interrupt Source
TGRA_0 input capture/compare match
TGRB_0 input capture/compare match
TGRC_0 input capture/compare match
TGRD_0 input capture/compare match
TCNT_0 overflow
TGRA_1 input capture/compare match
TGRB_1 input capture/compare match
TCNT_1 overflow
TCNT_1 underflow
TGRA_2 input capture/compare match
TGRB_2 input capture/compare match
TCNT_2 overflow
TCNT_2 underflow
Interrupt Flag
TGFA_0
TGFB_0
TGFC_0
TGFD_0
TCFV_0
TGFA_1
TGFB_1
TCFV_1
TCFU_1
TGFA_2
TGFB_2
TCFV_2
TCFU_2
DTC
Activation *
Possible
Possible
Possible
Possible
Not possible
Possible
Possible
Not possible
Not possible
Possible
Possible
Not possible
Not possible
Priority Level
High
Low
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