DF2266TF13V Renesas Electronics America, DF2266TF13V Datasheet - Page 613
DF2266TF13V
Manufacturer Part Number
DF2266TF13V
Description
IC H8S/2266 MCU FLASH 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet
1.DF2266TF20V.pdf
(712 pages)
Specifications of DF2266TF13V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
13MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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22.3
22.3.1
When the SLEEP instruction is executed while the SBYCR SSBY bit = 0 and the LPWRCR
LSON bit = 0, the CPU enters the sleep mode. In sleep mode, CPU operation stops but the
contents of the CPU’s internal registers are retained. Other peripheral modules do not stop.
22.3.2
Sleep mode is exited by any interrupt, or signals at the RES, or STBY pins.
• Exiting Sleep Mode by Interrupts
• Exiting Sleep Mode by RES pin
• Exiting Sleep Mode by STBY Pin
Bus master clock
Internal address bus
Internal clock φ,
peripheral module clock
Internal write signal
When an interrupt occurs, sleep mode is exited and interrupt exception processing starts. Sleep
mode is not exited if the interrupt is disabled, or interrupts other than NMI are masked by the
CPU.
Setting the RES pin level low selects the reset state. After the stipulated reset input duration,
driving the RES pin high starts the CPU performing reset exception processing.
When the STBY pin level is driven low, a transition is made to hardware standby mode.
Sleep Mode
Sleep Mode
Exiting Sleep Mode
Figure 22.2 Medium-Speed Mode Transition and Clearance Timing
SBYCR
Medium-speed mode
Rev. 5.00 Sep. 01, 2009 Page 561 of 656
Section 22 Power-Down Modes
SBYCR
REJ09B0071-0500
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