D6417709SF167BV Renesas Electronics America, D6417709SF167BV Datasheet - Page 283
D6417709SF167BV
Manufacturer Part Number
D6417709SF167BV
Description
IC SUPER H MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417709SBP167BV.pdf
(809 pages)
Specifications of D6417709SF167BV
Core Processor
SH-3
Core Size
32-Bit
Speed
167MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417709SF167BV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Bits 10 and 9—Area 0 Burst ROM Control (A0BST1, A0BST0): Specify whether to use burst
ROM in physical space area 0. When burst ROM is used, these bits set the number of burst
transfers.
Bits 8 and 7—Area 5 Burst Enable (A5BST1, A5BST0): Specify whether to use burst ROM
and PCMCIA burst mode in physical space area 5. When burst ROM and PCMCIA burst mode
are used, these bits set the number of burst transfers.
Bits 6 and 5—Area 6 Burst Enable (A6BST1, A6BST0): Specify whether to use burst ROM
and PCMCIA burst mode in physical space area 6. When burst ROM and PCMCIA burst mode
are used, these bits set the number of burst transfers.
Bit 10: A0BST1
0
1
Bit 8: A5BST1
0
1
Bit 9: A0BST0
0
1
0
1
Bit 7: A5BST0
0
1
0
1
Description
Access area 0 accessed as ordinary memory
Access area 0 accessed as burst ROM (4 consecutive
accesses). Can be used when bus width is 8, 16, or 32.
Access area 0 accessed as burst ROM (8 consecutive
accesses). Can be used when bus width is 8 or 16.
Should not be specified when bus width is 16 or 32.
Access area 0 accessed as burst ROM (16 consecutive
accesses). Can be used only when bus width is 8.
Should not be specified when bus width is 16 or 32.
Description
Access area 5 accessed as ordinary memory
Burst access of area 5 (4 consecutive accesses). Can
be used when bus width is 8, 16, or 32.
Burst access of area 5 (8 consecutive accesses). Can
be used when bus width is 8 or 16. Should not be
specified when bus width is 32.
Burst access of area 5 (16 consecutive accesses). Can
be used only when bus width is 8. Should not be
specified when bus width is 16 or 32.
Rev. 5.00, 09/03, page 237 of 760
(Initial value)
(Initial value)
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