D6417709SF167BV Renesas Electronics America, D6417709SF167BV Datasheet - Page 446
D6417709SF167BV
Manufacturer Part Number
D6417709SF167BV
Description
IC SUPER H MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417709SBP167BV.pdf
(809 pages)
Specifications of D6417709SF167BV
Core Processor
SH-3
Core Size
32-Bit
Speed
167MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417709SF167BV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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12.3
Each of three channels has a 32-bit timer counter (TCNT) and a 32-bit timer constant register
(TCOR). TCNT counts down. The auto-reload function enables cycle counting and counting by
external events. Channel 2 has an input capture function.
12.3.1
When the STR0–STR2 bits in the timer start register (TSTR) are set to 1, the corresponding timer
counter (TCNT) starts counting. When a TCNT underflows, the UNF flag of the corresponding
timer control register (TCR) is set. At this time, if the UNIE bit in TCR is 1, an interrupt request is
sent to the CPU. Also at this time, the value is copied from TCOR to TCNT and the down-count
operation is continued.
The count operation is set as follows (figure 12.2):
1. Select the counter clock with the TPSC2–TPSC0 bits in the timer control register (TCR). If the
2. Use the UNIE bit in TCR to set whether to generate an interrupt when TCNT underflows.
3. When using the input capture function, set the ICPE bits in TCR, including the choice of
4. Set a value in the timer constant register (TCOR) (the cycle is the set value plus 1).
5. Set the initial value in the timer counter (TCNT).
6. Set the STR bit in the timer start register (TSTR) to 1 to start operation.
Rev. 5.00, 09/03, page 400 of 760
external clock is selected, set the TCLK pin to input mode with the TOCE bit in TOCR, and
select its edge with the CKEG1 and CKEG0 bits in TCR.
whether or not to use the interrupt function (channel 2 only).
TMU Operation
General Operation
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