AT90PWM1-16MU Atmel, AT90PWM1-16MU Datasheet - Page 157

• Manufacturer Part Number: AT90PWM1-16MU
• Description: IC AVR PWM 8KB FLASH 16MHZ 32QFN
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM1-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16.25.5
16.25.6
16.25.7
16.25.8
16.25.9
4378C–AVR–09/08
Output Compare SB Register – OCRnSBH and OCRnSBL
Output Compare RB Register – OCRnRBH and OCRnRBL
PSC 0 Configuration Register – PCNF0
PSC 1 Configuration Register – PCNF1
PSC 2 Configuration Register – PCNF2
Note : n = 0 to 2 according to PSC number.
The Output Compare Registers RA, RB, SA and SB contain a 12-bit value that is continuously
compared with the PSC counter value. A match can be used to generate an Output Compare
interrupt, or to generate a waveform output on the associated pin.
The Output Compare Registers RB contains also a 4-bit value that is used for the flank width
modulation.
The Output Compare Registers are 16bit and 12-bit in size. To ensure that both the high and low
bytes are written simultaneously when the CPU writes to these registers, the access is per-
formed using an 8-bit temporary high byte register (TEMP). This temporary register is shared by
all the other 16-bit registers.
The PSC n Configuration Register is used to configure the running mode of the PSC.
• Bit 7 - PFIFTYn: PSC n Fifty
Writing this bit to one, set the PSC in a fifty percent mode where only OCRnRBH/L and
OCRnSBH/L are used. They are duplicated in OCRnRAH/L and OCRnSAH/L during the update
of OCRnRBH/L. This feature is useful to perform fifty percent waveforms.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
PFIFTY0
PFIFTY1
PFIFTY2
R/W
R/W
R/W
W
W
7
–
0
7
0
7
0
7
0
7
0
PALOCK0
PALOCK1
PALOCK2
OCRnRB[15:12]
R/W
R/W
R/W
W
W
6
–
0
6
0
6
0
6
0
6
0
PLOCK0
PLOCK1
PLOCK2
R/W
R/W
R/W
W
W
5
–
0
5
0
5
0
5
0
5
0
PMODE01
PMODE11
PMODE21
R/W
R/W
R/W
W
W
OCRnSB[7:0]
OCRnRB[7:0]
4
–
0
4
0
4
0
4
0
4
0
PMODE00
PMODE10
PMODE20
R/W
R/W
R/W
W
W
3
0
3
0
3
0
3
0
3
0
POP0
POP1
POP2
R/W
R/W
R/W
OCRnSB[11:8]
OCRnRB[11:8]
W
W
2
0
2
0
2
0
2
0
2
0
PCLKSEL0
PCLKSEL1
PCLKSEL2
R/W
R/W
R/W
W
W
1
0
1
0
1
0
1
0
1
0
AT90PWM1
POME2
R/W
R/W
R/W
W
W
0
0
0
0
0
0
0
0
0
0
-
-
OCRnSBH
OCRnRBH
OCRnSBL
OCRnRBL
PCNF0
PCNF1
PCNF2
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