AT90PWM1-16MU Atmel, AT90PWM1-16MU Datasheet - Page 91

• Manufacturer Part Number: AT90PWM1-16MU
• Description: IC AVR PWM 8KB FLASH 16MHZ 32QFN
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM1-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4378C–AVR–09/08
These bits control the Output Compare pin (OC0B) behavior. If one or both of the COM0B1:0
bits are set, the OC0B output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC0B pin
must be set in order to enable the output driver.
When OC0B is connected to the pin, the function of the COM0B1:0 bits depends on the
WGM02:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 23. Compare Output Mode, non-PWM Mode
Table 24
mode.
Table 24. Compare Output Mode, Fast PWM Mode
Note:
Table 25
PWM mode.
Table 25. Compare Output Mode, Phase Correct PWM Mode
Note:
• Bits 3, 2 – Res: Reserved Bits
These bits are reserved bits in the AT90PWM1 and will always read as zero.
• Bits 1:0 – WGM01:0: Waveform Generation Mode
COM0B1
COM0B1
COM0B1
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to phase correct
shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to fast PWM
pare Match is ignored, but the set or clear is done at TOP. See
for more details.
pare Match is ignored, but the set or clear is done at TOP. See
page 87
COM0B0
COM0B0
COM0B0
0
1
0
1
0
1
0
1
0
1
0
1
for more details.
Table 23
Description
Normal port operation, OC0B disconnected.
Toggle OC0B on Compare Match
Clear OC0B on Compare Match
Set OC0B on Compare Match
Description
Normal port operation, OC0B disconnected.
Reserved
Clear OC0B on Compare Match, set OC0B at TOP
Set OC0B on Compare Match, clear OC0B at TOP
Description
Normal port operation, OC0B disconnected.
Reserved
Clear OC0B on Compare Match when up-counting. Set OC0B on
Compare Match when down-counting.
Set OC0B on Compare Match when up-counting. Clear OC0B on
Compare Match when down-counting.
shows the COM0B1:0 bit functionality when the WGM02:0 bits
(1)
(1)
“Phase Correct PWM Mode” on
“Fast PWM Mode” on page 85
AT90PWM1
91