AT90PWM1-16MU Atmel, AT90PWM1-16MU Datasheet - Page 56

• Manufacturer Part Number: AT90PWM1-16MU
• Description: IC AVR PWM 8KB FLASH 16MHZ 32QFN
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM1-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.1.1
10.1.2
56
AT90PWM1
Moving Interrupts Between Application and Boot Space
MCU Control Register – MCUCR
When the BOOTRST Fuse is programmed, the Boot section size set to 2K bytes and the IVSEL
bit in the MCUCR Register is set before any interrupts are enabled, the most typical and general
program setup for the Reset and Interrupt Vector Addresses in AT90PWM1 is:
The MCU Control Register controls the placement of the Interrupt Vector table.
• Bit 1 – IVSEL: Interrupt Vector Select
When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the Flash
memory. When this bit is set (one), the Interrupt Vectors are moved to the beginning of the Boot
Loader section of the Flash. The actual address of the start of the Boot Flash Section is deter-
mined by the BOOTSZ Fuses. Refer to the section
Self-Programming” on page 205
tables, a special write procedure must be followed to change the IVSEL bit:
Interrupts will automatically be disabled while this sequence is executed. Interrupts are disabled
in the cycle IVCE is set, and they remain disabled until after the instruction following the write to
Bit
Read/Write
Initial Value
0xC01
0xC02
0xC03
0xC04
0xC05
Address Labels Code
;
.org 0xC00
0xC00
0xC01
0xC02
...
0xC1F
;
0xC20
0xC21
0xC22
0xC23
0xC24
0xC25
1. Write the Interrupt Vector Change Enable (IVCE) bit to one.
2. Within four cycles, write the desired value to IVSEL while writing a zero to IVCE.
RESET: ldi
SPIPS
R/W
7
0
out
ldi
out
sei
<instr>
rjmp
rjmp
rjmp
...
rjmp
out
ldi
out
sei
<instr>
R
6
–
0
SPH,r16
r16,low(RAMEND)
SPL,r16
RESET
PSC2_CAPT
PSC2_EC
...
SPM_RDY
r16,high(RAMEND); Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
xxx
xxx
for details. To avoid unintentional changes of Interrupt Vector
R
5
–
0
PUD
R/W
4
0
; Set Stack Pointer to top of RAM
; Enable interrupts
Comments
; Reset handler
; PSC2 Capture event Handler
; PSC2 End Cycle Handler
;
; Store Program Memory Ready Handler
; Set Stack Pointer to top of RAM
; Enable interrupts
“Boot Loader Support – Read-While-Write
R
3
–
0
R
2
–
0
IVSEL
R/W
1
0
IVCE
R/W
0
0
4378C–AVR–09/08
MCUCR