AT90PWM1-16MU Atmel, AT90PWM1-16MU Datasheet - Page 72

• Manufacturer Part Number: AT90PWM1-16MU
• Description: IC AVR PWM 8KB FLASH 16MHZ 32QFN
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM1-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.4
11.4.1
11.4.2
72
Register Description for I/O-Ports
AT90PWM1
Port B Data Register – PORTB
Port B Data Direction Register – DDRB
XTAL1: Chip clock Oscillator pin 1. Used for all chip clock sources except internal calibrated RC
Oscillator. When used as a clock pin, the pin can not be used as an I/O pin.
OC0B, Output Compare Match B output: This pin can serve as an external output for the
Timer/Counter0 Output Compare B. The pin has to be configured as an output (DDE1 set “one”)
to serve this function. This pin is also the output pin for the PWM mode timer function.
• RESET/OCD – Bit 0
RESET, Reset pin: When the RSTDISBL Fuse is programmed, this pin functions as a normal I/O
pin, and the part will have to rely on Power-on Reset and Brown-out Reset as its reset sources.
When the RSTDISBL Fuse is unprogrammed, the reset circuitry is connected to the pin, and the
pin can not be used as an I/O pin.
If PE0 is used as a reset pin, DDE0, PORTE0 and PINE0 will all read 0.
Table 16
on page
Table 16. Overriding Signals for Alternate Functions in PE2..PE0
Bit
Read/Write
Initial Value
Bit
Read/Write
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
63.
relates the alternate functions of Port E to the overriding signals shown in
PORTB7
DDB7
R/W
R/W
7
0
7
PORTB6
PE2/ADC0/
XTAL2
0
0
0
0
0
0
ADC0D
0
Osc Output
ADC0
DDB6
R/W
R/W
6
0
6
PORTB5
DDB5
R/W
R/W
5
0
5
PORTB4
DDB4
R/W
R/W
4
0
4
PE1/OC0B
0
0
0
0
OC0Ben
OC0B
0
0
Osc / Clock input
PORTB3
DDB3
R/W
R/W
3
0
3
PORTB2
DDB2
R/W
R/W
2
0
2
PORTB1
DDB1
R/W
R/W
1
0
1
PE0/RESET/
OCD
0
0
0
0
0
0
0
0
PORTB0
DDB0
R/W
R/W
0
0
0
4378C–AVR–09/08
Figure 11-5
PORTB
DDRB