AT90PWM1-16MU Atmel, AT90PWM1-16MU Datasheet - Page 79

• Manufacturer Part Number: AT90PWM1-16MU
• Description: IC AVR PWM 8KB FLASH 16MHZ 32QFN
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM1-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14. 8-bit Timer/Counter0 with PWM
14.1
14.1.1
4378C–AVR–09/08
Overview
Definitions
Timer/Counter0 is a general purpose 8-bit Timer/Counter module, with two independent Output
Compare Units, and with PWM support. It allows accurate program execution timing (event man-
agement) and wave generation. The main features are:
•
•
•
•
•
•
•
A simplified block diagram of the 8-bit Timer/Counter is shown in
placement of I/O pins, refer to
including I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit loca-
tions are listed in the
The PRTIM0 bit in
Timer/Counter0 module.
Figure 14-1. 8-bit Timer/Counter Block Diagram
Many register and bit references in this section are written in general form. A lower case “n”
replaces the Timer/Counter number, in this case 0. A lower case “x” replaces the Output Com-
pare Unit, in this case Compare Unit A or Compare Unit B. However, when using the register or
bit defines in a program, the precise form must be used, i.e., TCNT0 for accessing
Timer/Counter0 counter value and so on.
Two Independent Output Compare Units
Double Buffered Output Compare Registers
Clear Timer on Compare Match (Auto Reload)
Glitch Free, Phase Correct Pulse Width Modulator (PWM)
Variable PWM Period
Frequency Generator
Three Independent Interrupt Sources (TOV0, OCF0A, and OCF0B)
Timer/Counter
OCRnx
TCCRnA
OCRnx
TCNTn
=
=
“Power Reduction Register” on page 39
“8-bit Timer/Counter Register Description” on page
direction
count
clear
“Pin Descriptions” on page
TOP
=
TCCRnB
Control Logic
Values
BOTTOM
Fixed
TOP
=
0
clk
Tn
Generation
Waveform
Generation
Waveform
Clock Select
( From Prescaler )
Detector
Edge
7. CPU accessible I/O Registers,
must be written to zero to enable
Figure
89.
AT90PWM1
OCnB
(Int.Req.)
14-1. For the actual
OCnB
OCnA
(Int.Req.)
OCnA
TOVn
(Int.Req.)
Tn
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