PIC16C770-I/P Microchip Technology, PIC16C770-I/P Datasheet - Page 175

• Manufacturer Part Number: PIC16C770-I/P
• Description: IC MCU CMOS A/D 2K 20MHZ 20-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C770-I/P

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: OTP
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 6x12b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Controller Family/series: PIC16C
• No. Of I/o's: 16
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• No. Of: RoHS Compliant
• Core: PIC
• Processor Series: PIC16C
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Data Ram Size: 256 B
• Data Rom Size: 256 B
• On-chip Adc: 6 bit
• Number Of Programmable I/os: 16
• Number Of Timers: 3 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Mounting Style: Through Hole
• Height: 3.3 mm
• Interface Type: I2C, SPI, SSP
• Length: 26.16 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4 V
• Width: 6.35 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA16XP200 - ADAPTER ICE 20DIP/SOIC/SSOPAC164028 - MODULE SKT PROMATEII 20SOIC/DIP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC16C770I/P

15.5
FIGURE 15-18:
TABLE 15-17: SPI MODE REQUIREMENTS (MASTER MODE, CKE = 0)
Note 1: Specification 73A is only required if specifications 71A and 72A are used.
Param.
71A*
72A*
73A*
2002 Microchip Technology Inc.
No.
70*
71*
72*
73*
74*
75*
76*
78*
79*
80*
(CKP = 0)
(CKP = 1)
SDI
SS
SCK
SCK
SDO
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only
Note: Refer to Figure 15-4 for load conditions.
and are not tested.
Master SSP SPI Mode Timing Waveforms and Requirements
TssL2scH,
TssL2scL
TscH
TscL
TdiV2scH,
TdiV2scL
T
TscH2diL,
TscL2diL
TdoR
TdoF
TscR
TscF
TscH2doV,
TscL2doV
B
Symbol
2
B
SPI MASTER MODE TIMING (CKE = 0)
Characteristic
SS to SCK or SCK input
SCK input high time
(Slave mode)
SCK input low time
(Slave mode)
Setup time of SDI data input to SCK edge
Last clock edge of Byte1 to the 1st clock
edge of Byte2
Hold time of SDI data input to SCK edge
SDO data output rise time PIC16CXXX
SDO data output fall time
SCK output rise time
(Master mode)
SCK output fall time (Master mode)
SDO data output valid
after SCK edge
70
80
71
73
MSb IN
MSb
74
72
75, 76
Continuous
Single Byte
Continuous
Single Byte
PIC16LCXXX
PIC16CXXX
PIC16LCXXX
PIC16CXXX
PIC16LCXXX
BIT6 - - - - - -1
BIT6 - - - -1
1.25T
1.25T
PIC16C717/770/771
1.5T
78
79
Min
100
100
T
CY
40
40
—
—
—
—
—
—
—
—
CY
CY
CY
+ 40
+ 30
+ 30
LSb
79
78
LSb IN
Typ† Max Units
10
20
10
10
20
10
—
—
—
—
—
—
—
—
—
—
100
—
—
—
—
—
—
—
—
25
45
25
25
45
25
50
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DS41120B-page 173
Note 1
Note 1
Note 1
Conditions