PIC16C770-I/P Microchip Technology, PIC16C770-I/P Datasheet - Page 84
![IC MCU CMOS A/D 2K 20MHZ 20-DIP](/photos/12/13/121303/150-20-dip_sml.jpg)
PIC16C770-I/P
Manufacturer Part Number
PIC16C770-I/P
Description
IC MCU CMOS A/D 2K 20MHZ 20-DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16C770-ISO.pdf
(220 pages)
2.PIC16C770-ISO.pdf
(6 pages)
3.PIC16C770-ISO.pdf
(8 pages)
Specifications of PIC16C770-I/P
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Oscillator Type
Internal
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 6x12b
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Controller Family/series
PIC16C
No. Of I/o's
16
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
3
No. Of
RoHS Compliant
Core
PIC
Processor Series
PIC16C
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Data Ram Size
256 B
Data Rom Size
256 B
On-chip Adc
6 bit
Number Of Programmable I/os
16
Number Of Timers
3 bit
Operating Supply Voltage
2.5 V to 5.5 V
Mounting Style
Through Hole
Height
3.3 mm
Interface Type
I2C, SPI, SSP
Length
26.16 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4 V
Width
6.35 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA16XP200 - ADAPTER ICE 20DIP/SOIC/SSOPAC164028 - MODULE SKT PROMATEII 20SOIC/DIP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC16C770I/P
- Current page: 84 of 220
- Download datasheet (4Mb)
PIC16C717/770/771
9.2.3
The addressing procedure for the I
the first byte after the START condition usually deter-
mines which device will be the slave addressed by the
master. The exception is the general call address,
which can address all devices. When this address is
used, all devices should, in theory, respond with an
Acknowledge.
The general call address is one of eight addresses
reserved for specific purposes by the I
consists of all 0’s with R/W = 0
The general call address is recognized when the Gen-
eral Call Enable bit (GCEN) is set (SSPCON2<7> is
set). Following a START bit detect, eight bits are shifted
FIGURE 9-12:
DS41120B-page 82
GCEN
(SSPCON2<7>)
SSPOV
(SSPCON<6>)
SDA
SCL
SSPIF
BF
(SSPSTAT<0>)
GENERAL CALL ADDRESS
SUPPORT
S
SLAVE MODE GENERAL CALL ADDRESS SEQUENCE (7- OR 10-BIT MODE)
1
2
General Call Address
2
C bus is such that
3
2
C protocol. It
4
Advance Information
5
6
7
R/W = 0
8
into the SSPSR, and the address is compared against
SSPADD. It is also compared to the general call
address, fixed in hardware.
If the general call address matches, the SSPSR is
transferred to the SSPBUF, the BF flag is set (eighth
bit), and on the falling edge of the ninth bit (ACK bit),
the SSPIF flag is set.
When the interrupt is serviced, the source for the inter-
rupt can be checked by reading the contents of the
SSPBUF to determine if the address was device spe-
cific or a general call address.
If the general call address is sampled with GCEN set
and the slave configured in 10-bit Address mode, the
second half of the address is not necessary. The UA bit
will not be set and the slave will begin receiving data
after the Acknowledge (Figure 9-12).
ACK
Address is compared to General Call Address
after ACK, set interrupt flag
9
D7
1
D6
2
Cleared in software
SSPBUF is read
Receiving data
D5
3
D4
4
D3
5
2002 Microchip Technology Inc.
D2
6
D1
7
D0
8
ACK
9
’0’
’1’
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