ATTINY25-15MZ Atmel, ATTINY25-15MZ Datasheet - Page 41

MCU AVR 2K FLASH 15MHZ 20-QFN

ATTINY25-15MZ

Manufacturer Part Number
ATTINY25-15MZ
Description
MCU AVR 2K FLASH 15MHZ 20-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY25-15MZ

Package / Case
20-QFN
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Number Of I /o
6
Eeprom Size
128 x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
128 x 8
Program Memory Size
2KB (2K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
USI
Core Size
8-Bit
Processor Series
ATTINY2x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
UART, SPI, USI
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Data Rom Size
128 B
A/d Bit Size
10 bit
A/d Channels Available
4
Height
0.75 mm
Length
4 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
4 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
8.9
7598H–AVR–07/09
Watchdog Timer
ADC is used. To reduce power consumption in Power-down mode, the user can avoid the three
conditions above to ensure that the reference is turned off before entering Power-down mode.
Table 8-4.
The Watchdog Timer is clocked from an On-chip Oscillator which runs at 128 kHz. By controlling
the Watchdog Timer prescaler, the Watchdog Reset interval can be adjusted as shown in
8-7 on page
Watchdog Timer is also reset when it is disabled and when a Chip Reset occurs. Ten different
clock cycle periods can be selected to determine the reset period. If the reset period expires
without another Watchdog Reset, the ATtiny25/45/85 resets and executes from the Reset Vec-
tor. For timing details on the Watchdog Reset, refer to
The Wathdog Timer can also be configured to generate an interrupt instead of a reset. This can
be very helpful when using the Watchdog to wake-up from Power-down.
To prevent unintentional disabling of the Watchdog or unintentional change of time-out period,
two different safety levels are selected by the fuse WDTON as shown in Table 8-5. Refer to
“Timed Sequences for Changing the Configuration of the Watchdog Timer” on page 44
details.
Table 8-5.
Figure 8-7.
WDTON
Unprogrammed
Programmed
Symbol
V
t
I
BG
BG
BG
Parameter
Bandgap reference voltage
Bandgap reference start-up time
Bandgap reference current
consumption
43. The WDR – Watchdog Reset – instruction resets the Watchdog Timer. The
Internal Voltage Reference Characteristics
WDT Configuration as a Function of the Fuse Settings of WDTON
Watchdog Timer
Safety
Level
1
2
WATCHDOG
OSCILLATOR
RESET
128 kHz
WDP0
WDP1
WDP2
WDP3
WDE
WDT Initial
State
Disabled
Enabled
V
CC
How to Disable the
WDT
Timed sequence
Always enabled
V
V
Condition
T
T
T
= 1.1V / 2.7V,
CC
CC
A
A
A
= 25°C
= 25°C
= 25°C
= 2.7V,
= 2.7V,
Table 8-7 on page
MCU RESET
PRESCALER
WATCHDOG
ATtiny25/45/85
Min
1.0
43.
How to Change
Time-out
No limitations
Timed sequence
Typ
1.1
40
15
Max
1.2
70
Units
µA
Table
µs
V
for
41

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