ATTINY25-15MZ Atmel, ATTINY25-15MZ Datasheet - Page 75

• Manufacturer Part Number: ATTINY25-15MZ
• Description: MCU AVR 2K FLASH 15MHZ 20-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY25-15MZ

• Package / Case: 20-QFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 6
• Eeprom Size: 128 x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Program Memory Size: 2KB (2K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: USI
• Core Size: 8-Bit
• Processor Series: ATTINY2x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: UART, SPI, USI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• Data Rom Size: 128 B
• A/d Bit Size: 10 bit
• A/d Channels Available: 4
• Height: 0.75 mm
• Length: 4 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 4 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.8.2
7598H–AVR–07/09
Timer/Counter Control Register B – TCCR0B
Table 12-7.
Notes:
• Bit 7 – FOC0A: Force Output Compare A
The FOC0A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0A bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC0A output is
changed according to its COM0A1:0 bits setting. Note that the FOC0A bit is implemented as a
strobe. Therefore it is the value present in the COM0A1:0 bits that determines the effect of the
forced compare.
A FOC0A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR0A as TOP.
The FOC0A bit is always read as zero.
• Bit 6 – FOC0B: Force Output Compare B
The FOC0B bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0B bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC0B output is
changed according to its COM0B1:0 bits setting. Note that the FOC0B bit is implemented as a
strobe. Therefore it is the value present in the COM0B1:0 bits that determines the effect of the
forced compare.
Bit
Read/Write
Initial Value
Mode
0
1
2
3
4
5
6
7
1. MAX
2. BOTTOM = 0x00
WGM2
0
0
0
0
1
1
1
1
Waveform Generation Mode Bit Description
FOC0A
W
7
0
= 0xFF
WGM1
0
0
1
1
0
0
1
1
FOC0B
W
6
0
WGM0
0
1
0
1
0
1
0
1
R
5
0
–
Timer/Counter
Mode of
Operation
Normal
PWM, Phase
Correct
CTC
Fast PWM
Reserved
PWM, Phase
Correct
Reserved
Fast PWM
R
4
–
0
WGM02
R/W
3
0
OCRA
OCRA
OCRA
0xFF
0xFF
0xFF
TOP
CS02
–
–
R/W
2
0
ATtiny25/45/85
Immediate
Immediate
Update of
OCRx at
CS01
R/W
TOP
TOP
TOP
TOP
1
0
–
–
CS00
R/W
0
0
Set on
TOV Flag
BOTTOM
BOTTOM
MAX
MAX
MAX
TOP
–
–
TCCR0B
(1)(2)
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