ATMEGA324PA-AU Atmel, ATMEGA324PA-AU Datasheet - Page 242

MCU AVR 32K FLASH 20MHZ 40-TQFP

ATMEGA324PA-AU

Manufacturer Part Number
ATMEGA324PA-AU
Description
MCU AVR 32K FLASH 20MHZ 40-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA324PA-AU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATQT600
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
2KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
TQFP
Package
44TQFP
Family Name
ATmega
Maximum Speed
20 MHz
Operating Supply Voltage
2.5|3.3|5 V
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Figure 22-1. Analog-to-digital Converter Block Schematic
22.3
8272A–AVR–01/10
BANDGAP (1.1V)
ADC[7:0]
REFERENCE
REFERENCE
(1.1V/2.56V)
INTERNAL
AVCC
AREF
Operation
GND
8-BIT DATABUS
ADC[2:0]
The ADC converts an analog input voltage to a 10-bit digital value through successive approxi-
mation. The minimum value represents GND and the maximum value represents the voltage on
the AREF pin minus 1 LSB. Optionally, AVCC or an internal 2.56V reference voltage may be
connected to the AREF pin by writing to the REFSn bits in the ADMUX Register. The internal
voltage reference may thus be decoupled by an external capacitor at the AREF pin to improve
noise immunity.
The analog input channel and differential gain are selected by writing to the MUX bits in
ADMUX. Any of the ADC input pins, as well as GND and a fixed bandgap voltage reference, can
be selected as single ended inputs to the ADC. A selection of ADC input pins can be selected as
positive and negative inputs to the differential gain amplifier.
164A/164PA/324A/324PA/644A/644PA/1284/1284P
ADC MULTIPLEXER
SELECT (ADMUX)
INPUT
INPUT
NEG
MUX
POS
MUX
MUX DECODER
+
-
REGISTER B (ADCSRB)
ADC CTRL & STATUS
AMPLIFIER
GAIN
10-bit DAC
REGISTER A (ADCSRA)
ADC CTRL & STATUS
ADC CONVERSION
COMPLETE IRQ
PRESCALER
CONVERSION LOGIC
+
-
ADTS[2:0]
START
TRIGGER
SELECT
SAMPLE & HOLD
INTERRUPT
COMPARATOR
ADC
MULTIPLEXER
OUTPUT
FLAGS
15
ADC DATA REGISTER
(ADCH/ADCL)
0
242

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