ATMEGA324PA-AU Atmel, ATMEGA324PA-AU Datasheet - Page 83

• Manufacturer Part Number: ATMEGA324PA-AU
• Description: MCU AVR 32K FLASH 20MHZ 40-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA324PA-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATQT600
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 20MHz
• Total Internal Ram Size: 2KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 1.8V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: TQFP
• Package: 44TQFP
• Family Name: ATmega
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Controller Family/series: AVR MEGA
• No. Of I/o's: 32
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 20MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.3.2
8272A–AVR–01/10
Alternate Functions of Port B
The Port B pins with alternate functions are shown in
Table 13-6.
The alternate pin configuration is as follows:
• SCK/PCINT15 – Port B, Bit 7
SCK: Master Clock output, Slave Clock input pin for SPI channel. When the SPI is enabled as a
slave, this pin is configured as an input regardless of the setting of DDB7. When the SPI0 is
enabled as a master, the data direction of this pin is controlled by DDB7. When the pin is forced
to be an input, the pull-up can still be controlled by the PORTB7 bit.
PCINT15, Pin Change Interrupt source 15: The PB7 pin can serve as an external interrupt
source.
• MISO/PCINT14 – Port B, Bit 6
MISO: Master Data input, Slave Data output pin for SPI channel. When the SPI is enabled as a
master, this pin is configured as an input regardless of the setting of DDB6. When the SPI is
enabled as a slave, the data direction of this pin is controlled by DDB6. When the pin is forced to
be an input, the pull-up can still be controlled by the PORTB6 bit.
PCINT14, Pin Change Interrupt source 14: The PB6 pin can serve as an external interrupt
source.
164A/164PA/324A/324PA/644A/644PA/1284/1284P
Port Pin
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
Alternate Functions
SCK (SPI Bus Master clock input)
PCINT15 (Pin Change Interrupt 15)
MISO (SPI Bus Master Input/Slave Output)
PCINT14 (Pin Change Interrupt 14)
MOSI (SPI Bus Master Output/Slave Input)
PCINT13 (Pin Change Interrupt 13)
SS (SPI Slave Select input)
OC0B (Timer/Conter 0 Output Compare Match B Output)
PCINT12 (Pin Change Interrupt 12)
AIN1 (Analog Comparator Negative Input)
OC0A (Timer/Conter 0 Output Compare Match A Output)
PCINT11 (Pin Change Interrupt 11)
AIN0 (Analog Comparator Positive Input)
INT2 (External Interrupt 2 Input)
PCINT10 (Pin Change Interrupt 10)
T1 (Timer/Counter 1 External Counter Input)
CLKO (Divided System Clock Output)
PCINT9 (Pin Change Interrupt 9)
T0 (Timer/Counter 0 External Counter Input)
XCK0 (USART0 External Clock Input/Output)
PCINT8 (Pin Change Interrupt 8)
Port B Pins Alternate Functions
Table
13-6.
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