ATMEGA324PA-AU Atmel, ATMEGA324PA-AU Datasheet - Page 299

MCU AVR 32K FLASH 20MHZ 40-TQFP

ATMEGA324PA-AU

Manufacturer Part Number
ATMEGA324PA-AU
Description
MCU AVR 32K FLASH 20MHZ 40-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA324PA-AU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATQT600
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
2KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
TQFP
Package
44TQFP
Family Name
ATmega
Maximum Speed
20 MHz
Operating Supply Voltage
2.5|3.3|5 V
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Table 26-8.
26.6
26.6.1
8272A–AVR–01/10
ATmega164A/ATmega164PA
ATmega324A/ATmega324PA
ATmega644A/ATmega644PA
ATmega1284/ATmega1284P
Parallel Programming Parameters, Pin Mapping, and Commands
Signal Names
Device
No. of Words in a Page and No. of Pages in the EEPROM
This section describes how to parallel program and verify Flash Program memory, EEPROM
D a t a m e m o r y , M e m o r y L o c k b i t s , a n d F u s e b i t s i n
the ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P. Pulses are assumed to be at
least 250 ns unless otherwise noted.
In this section, some pins of the ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P
are referenced by signal names describing their functionality during parallel programming, see
Figure 26-1 on page 299
are referenced by pin names.
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse.
The bit coding is shown in
When pulsing WR or OE, the command loaded determines the action executed. The different
commands are shown in
Figure 26-1. Parallel Programming
Note:
164A/164PA/324A/324PA/644A/644PA/1284/1284P
1. Unused Pins should be left floating.
EEPROM Size
512 bytes
1 Kbytes
2 Kbytes
4 Kbytes
Table 26-13 on page
RDY/BSY
and
Table 26-12 on page
PAGEL
+12 V
BS2
BS1
XA0
XA1
WR
OE
Page Size
Figure 26-9 on page
4 bytes
4 bytes
8 bytes
8 bytes
(1)
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RESET
XTAL1
GND
PA0
PCWORD
EEA[1:0]
EEA[1:0]
EEA[2:0]
EEA[2:0]
301.
300.
300. Pins not described in the following table
PB7 - PB0
AVCC
VCC
No. of Pages
128
256
256
512
+5V
+5V
DATA
EEA[10:2]
EEA[11:3]
PCPAGE
EEA[8:2]
EEA[9:2]
EEAMSB
10
11
8
9
299

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