ATMEGA329P-20MN Atmel, ATMEGA329P-20MN Datasheet - Page 106

• Manufacturer Part Number: ATMEGA329P-20MN
• Description: IC MCU AVR 32K 20MHZ 64QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA329P-20MN

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15. 16-bit Timer/Counter1
15.1
15.2
8021G–AVR–03/11
Features
Overview
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The 16-bit Timer/Counter unit allows accurate program execution timing (event management),
wave generation, and signal timing measurement.
Most register and bit references in this section are written in general form. A lower case “n”
replaces the Timer/Counter number, and a lower case “x” replaces the Output Compare unit.
However, when using the register or bit defines in a program, the precise form must be used,
i.e., TCNT1 for accessing Timer/Counter1 counter value and so on.
A simplified block diagram of the 16-bit Timer/Counter is shown in
placement of I/O pins, refer to
ATmega3290P” on page
shown in bold. The device-specific I/O Register and bit locations are listed in the
Description” on page
The PRTIM1 bit in
Timer/Counter1 module.
True 16-bit Design (i.e., Allows 16-bit PWM)
Two independent Output Compare Units
Double Buffered Output Compare Registers
One Input Capture Unit
Input Capture Noise Canceler
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Variable PWM Period
Frequency Generator
External Event Counter
Four independent interrupt Sources (TOV1, OCF1A, OCF1B, and ICF1)
”Power Reduction Register” on page 39
127.
3. CPU accessible I/O Registers, including I/O bits and I/O pins, are
”MLF/ Pinout ATmega329P” on page 2
ATmega329P/3290P
must be written to zero to enable the
Figure
and
15-1. For the actual
”TQFP / Pinout
”Register
106