ATMEGA329P-20MN Atmel, ATMEGA329P-20MN Datasheet - Page 74

• Manufacturer Part Number: ATMEGA329P-20MN
• Description: IC MCU AVR 32K 20MHZ 64QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA329P-20MN

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8021G–AVR–03/11
low. When the SPI is enabled as a Master, the data direction of this pin is controlled by DDB0.
When the pin is forced to be an input, the pull-up can still be controlled by the PORTB0 bit
PCINT8, Pin Change Interrupt Source 8: The PB0 pin can serve as an external interrupt source.
Table 13-7
shown in
MISO signal, while MOSI is divided into SPI MSTR OUTPUT and SPI SLAVE INPUT.
Table 13-7.
Table 13-8.
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
Figure 13-5 on page
and
Overriding Signals for Alternate Functions in PB7:PB4
Overriding Signals for Alternate Functions in PB3:PB0
Table 13-8
PB7/OC2A/
PCINT15
0
0
0
0
OC2A ENABLE
OC2A
–
PCINT15 • PCIE1
1
PCINT15 INPUT
–
PB3/MISO/
PCINT11
SPE • MSTR
PORTB3 • PUD
SPE • MSTR
0
SPE • MSTR
SPI SLAVE
OUTPUT
–
PCINT11 • PCIE1
1
PCINT11 INPUT
SPI MSTR INPUT
–
relate the alternate functions of Port B to the overriding signals
69. SPI MSTR INPUT and SPI SLAVE OUTPUT constitute the
PB6/OC1B/
PCINT14
0
0
0
0
OC1B ENABLE
OC1B
–
PCINT14 • PCIE1
1
PCINT14 INPUT
–
PB2/MOSI/
PCINT10
SPE • MSTR
PORTB2 • PUD
SPE • MSTR
0
SPE • MSTR
SPI MSTR
OUTPUT
–
PCINT10 • PCIE1
1
PCINT10 INPUT
SPI SLAVE INPUT
–
PB5/OC1A/
PCINT13
0
0
0
0
OC1A ENABLE
OC1A
–
PCINT13 • PCIE1
1
PCINT13 INPUT
–
PB1/SCK/
PCINT9
SPE • MSTR
PORTB1 • PUD
SPE • MSTR
0
SPE • MSTR
SCK OUTPUT
–
PCINT9 • PCIE1
1
PCINT9 INPUT
SCK INPUT
–
ATmega329P/3290P
PB4/OC0A/
PCINT12
0
0
0
0
OC0A ENABLE
OC0A
–
PCINT12 • PCIE1
1
PCINT12 INPUT
–
PB0/SS/
PCINT8
SPE • MSTR
PORTB0 • PUD
SPE • MSTR
0
0
0
–
PCINT8 • PCIE1
1
PCINT8 INPUT
SPI SS
–
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