ATMEGA32U2-MU Atmel, ATMEGA32U2-MU Datasheet - Page 195
ATMEGA32U2-MU
Manufacturer Part Number
ATMEGA32U2-MU
Description
MCU AVR USB 32K FLASH IND 32VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32U2-MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2.5 KB
Interface Type
SPI, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
22
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525
Minimum Operating Temperature
- 40 C
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
- Current page: 195 of 309
- Download datasheet (6Mb)
20.10 Registers Description
20.10.1
20.10.2
7799D–AVR–11/10
USBCON – USB General Control Registers
UPOE – USB Software Output Enable register
Resuming the USB interface
• Bit 7 – USBE: USB macro Enable Bit
Writing this bit to one enables the USB controller and the USB data buffers (D+ and D-). Clear-
ing this bit disables the USB controller and buffers. When cleared the USB controller is reset.
• Bit 6 – Res: Reserved
This bit is reserved and should always read as zero.
• Bit 5 – FRZCLK: Freeze USB Clock Bit
Writing this bit to one disables the internal clock for the USB controller, and tehreby freezing it.
Activating this mode reduces power consumption. All the USB flags are kept unchanged. Only
the “Resume detection” is still active in this mode.
Writing this bit to zero unfreezes the USB controller and allows full operation of the USB
interface.
• Bits 4:0 – Res: Reserved
These bits are reserved and should always read as zero.
• Bit 7:6 – UPWE[1:0]: USB Buffers Direct Drive enable configuration
These bits select the mode of operation of the USB buffers according to
ble configurations of these bits allows to enable or disable the USB buffers direct drive by soft-
ware. When direct drive for USB buffers is enable, the UPDRV[1:0] values are output to the
Bit
Read/Write
Initial Value
Bit
(0xFB)
Read/Write
Initial Value
• Be sure to have interrupts enabled (WAKEUPE) to exit sleep mode
• Put the MCU in sleep mode
• Enable PLL
• Wait PLL lock
• Clear USB suspend clock
• Clear Resume information
(0xD8)
USBE
UPWE1
R/W
R/W
7
0
7
0
UPWE0
R/W
R
6
0
-
6
0
FRZLK
UPDRV1
R/W
R/W
5
1
5
0
UPDRV0
R/W
R
4
0
-
4
0
ATmega8U2/16U2/32U2
R
3
0
R
3
0
-
-
R
R
2
0
2
0
-
-
DPI
R
1
0
R
1
0
-
Table
20-2. The possi-
DMI
0
R
0
R
0
0
-
USBCON
UPOE
195
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