ATMEGA32U2-MU Atmel, ATMEGA32U2-MU Datasheet - Page 197
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ATMEGA32U2-MU
Manufacturer Part Number
ATMEGA32U2-MU
Description
MCU AVR USB 32K FLASH IND 32VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32U2-MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2.5 KB
Interface Type
SPI, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
22
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525
Minimum Operating Temperature
- 40 C
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
- Current page: 197 of 309
- Download datasheet (6Mb)
21. USB Device Operating modes
21.1
21.2
21.3
7799D–AVR–11/10
Overview
Power-on and reset
Endpoint reset
The USB device controller supports full speed data transfers. In addition to the default control
endpoint, it provides four other endpoints, which can be configured in control, bulk, interrupt or
isochronous modes:
The controller starts in the “idle” mode. In this mode, the pad consumption is reduced to the
minimum.
The next diagram explains the USB device controller main states on power-on:
Figure 21-1. USB device controller states after reset
The reset state of the Device controller is:
The D+ pull-up will be activated as soon as the DETACH bit is cleared.
The macro is in the ‘Idle’ state after reset with a minimum power consumption and does not
need to have the PLL activated to enter in this state.
The USB device controller can at any time be reset by clearing USBE.
An endpoint can be reset at any time by setting in the UERST register the bit corresponding to
the endpoint (EPRSTx). This resets:
• the macro clock is stopped in order to minimize the power consumption (FRZCLK set),
• the USB device controller internal state is reset (all the registers are reset to their default
• the endpoint banks are reset
• the D+ pull up are not activated (mode Detach)
• the internal state machine on that endpoint,
• Endpoint 0:
• Endpoint 1 and 2:
• Endpoint 3 and 4:
value. Note that DETACH is set.)
Programmable size FIFO up to 64 bytes, default control endpoint
Programmable size FIFO up to 64 bytes.
Programmable size FIFO up to 64 bytes with ping-pong mode.
RESET
HW
USBE=0
Reset
USBE=0
state>
<any
other
USBE=1
UID=1
ATmega8U2/16U2/32U2
Idle
197
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