ATSAM3S1BA-AU Atmel, ATSAM3S1BA-AU Datasheet - Page 627
ATSAM3S1BA-AU
Manufacturer Part Number
ATSAM3S1BA-AU
Description
IC MCU 32BIT 64KB FLASH 64LQFP
Manufacturer
Atmel
Series
SAM3Sr
Specifications of ATSAM3S1BA-AU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
47
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 10x10/12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Controller Family/series
ATSAM3S
No. Of I/o's
47
Ram Memory Size
16KB
Cpu Speed
64MHz
No. Of Timers
6
Rohs Compliant
Yes
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Figure 31-17. TWI Write Operation with Multiple Data Bytes with or without Internal Address
6500C–ATARM–8-Feb-11
TWI_THR = data to send
Yes
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
- Internal address size
Set the Master Mode register:
TWI_CR = MSEN + SVDIS
Internal address size = 0?
Write ==> bit MREAD = 0
TWI_THR = Data to send
Write STOP Command
Set the Control register:
- Device slave address
Load Transmit register
- Transfer direction bit
Read Status register
Read Status register
(Needed only once)
TWI_CR = STOP
- Master enable
TXCOMP = 1?
Yes
Data to send?
Yes
Set TWI clock
TXRDY = 1?
Yes
BEGIN
END
(if IADR used)
No
No
No
SAM3S Preliminary
Set the internal address
TWI_IADR = address
627
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