ATSAM3S1BA-AU Atmel, ATSAM3S1BA-AU Datasheet - Page 95
ATSAM3S1BA-AU
Manufacturer Part Number
ATSAM3S1BA-AU
Description
IC MCU 32BIT 64KB FLASH 64LQFP
Manufacturer
Atmel
Series
SAM3Sr
Specifications of ATSAM3S1BA-AU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
47
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 10x10/12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Controller Family/series
ATSAM3S
No. Of I/o's
47
Ram Memory Size
16KB
Cpu Speed
64MHz
No. Of Timers
6
Rohs Compliant
Yes
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 95 of 1118
- Download datasheet (24Mb)
10.12.5
10.12.5.1
10.12.5.2
10.12.5.3
6500C–ATARM–8-Feb-11
LDR, PC-relative
Syntax
Operation
Restrictions
Load register from memory.
where:
type
cond
Rt
Rt2
label
LDR loads a register with a value from a PC-relative memory address. The memory address is
specified by a label or by an offset from the PC.
The value to load or store can be a byte, halfword, or word. For load instructions, bytes and half-
words can either be signed or unsigned. See
label must be within a limited range of the current instruction.
offsets between label and the PC.
Table 10-19. Offset ranges
You might have to use the .W suffix to get the maximum offset range. See
selection” on page
In these instructions:
When Rt is PC in a word load instruction:
Instruction type
Word, halfword, signed halfword, byte, signed
byte
Two words
• Rt can be SP or PC only for word loads
• Rt2 must not be SP and must not be PC
• Rt must be different from Rt2.
LDR{type}{cond} Rt, label
LDRD{cond} Rt, Rt2, label
B
SB
H
SH
-
is one of:
unsigned byte, zero extend to 32 bits.
signed byte, sign extend to 32 bits.
unsigned halfword, zero extend to 32 bits.
signed halfword, sign extend to 32 bits.
omit, for word.
is an optional condition code, see
is the register to load or store.
is the second register to load or store.
is a PC-relative expression. See
86.
“Address alignment” on page
; Load two words
Offset range
− 4095 to 4095
− 1020 to 1020
“PC-relative expressions” on page
“Conditional execution” on page
SAM3S Preliminary
Table 10-19
83.
shows the possible
“Instruction width
84.
84.
95
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