ATSAM3S1BA-AU Atmel, ATSAM3S1BA-AU Datasheet - Page 714

• Manufacturer Part Number: ATSAM3S1BA-AU
• Description: IC MCU 32BIT 64KB FLASH 64LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S1BA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 47
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 10x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 47
• Ram Memory Size: 16KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

33.7.8.7
Figure 33-40. Test Modes
33.7.8.8
33.7.8.9
714
714
WRITE BUFFER
DATA 0
DATA N
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|
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SAM3S Preliminary
SAM3S Preliminary
Receiver Timeout
Normal Mode
Automatic Echo Mode
(Peripheral) DMA
Controller
reception but only a low level. However, this low level must be present on the slave select line
(NSS) at least 1 Tbit before the first serial clock cycle corresponding to the MSB bit.
Because the receiver baudrate clock is active only during data transfers in SPI Mode, a receiver
timeout is impossible in this mode, whatever the Time-out value is (field TO) in the Time-out
Register (US_RTOR).
The USART can be programmed to operate in three different test modes. The internal loopback
capability allows on-board diagnostics. In the loopback mode the USART interface pins are dis-
connected or not and reconfigured for loopback internally or externally.
Normal mode connects the RXD pin on the receiver input and the transmitter output on the TXD
pin.
Figure 33-41. Normal Mode Configuration
Automatic echo mode allows bit-by-bit retransmission. When a bit is received on the RXD pin, it
is sent to the TXD pin, as shown in
the TXD pin. The RXD pin is still connected to the receiver input, thus the receiver remains
active.
Figure 33-42. Automatic Echo Mode Configuration
APB bus
TXRDY
LIN CONTROLLER
USART3
Transmitter
Transmitter
Receiver
Receiver
Figure
READ BUFFER
DATA N
DATA 0
|
|
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33-42. Programming the transmitter has no effect on
(Peripheral) DMA
Controller
RXD
TXD
RXD
TXD
APB bus
RXRDY
6500C–ATARM–8-Feb-11
6500C–ATARM–8-Feb-11
NACT = SUBSCRIBE
LIN CONTROLLER
USART3