AT91SAM9G45-CU-999 Atmel, AT91SAM9G45-CU-999 Datasheet - Page 666
AT91SAM9G45-CU-999
Manufacturer Part Number
AT91SAM9G45-CU-999
Description
IC MCU ARM9 APMC 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9G45-EKES.pdf
(1218 pages)
Specifications of AT91SAM9G45-CU-999
Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Part Number
Manufacturer
Quantity
Price
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34.7
Figure 34-4. SSC Functional Block Diagram
666
Functional Description
AT91SAM9G45
APB
MCK
Interface
Divider
Clock
User
This chapter contains the functional description of the following: SSC Functional Block, Clock
Management, Data format, Start, Transmitter, Receiver and Frame Sync.
The receiver and transmitter operate separately. However, they can work synchronously by pro-
gramming the receiver to use the transmit clock and/or to start a data transfer when transmission
starts. Alternatively, this can be done by programming the transmitter to use the receive clock
and/or to start a data transfer when reception starts. The transmitter and the receiver can be pro-
grammed to operate with the clock signals provided on either the TK or RK pins. This allows the
SSC to support many slave-mode data transfers. The maximum clock speed allowed on the TK
and RK pins is the master clock divided by 2.
Interrupt Control
AIC
RXEN
TX Start
RF
RC0R
TXEN
RX Start
TF
TX Clock
TK Input
RK Input
RX clock
Selector
Selector
Start
Start
Receive Holding
Transmit Holding
Register
Register
Transmitter
Transmit Clock
Receive Shift Register
TX Start
Receive Clock
Transmit Shift Register
Controller
Controller
Receiver
RX Start
Holding Register
Holding Register
RX Clock
Receive Sync
TX clock
Transmit Sync
Clock Output
Frame Sync
Frame Sync
Clock Output
Controller
Controller
Controller
Controller
Controller
Controller
Data
Data
6438F–ATARM–21-Jun-10
RD
TD
RK
RF
TK
TF
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