ATMEGA2561-16AU Atmel, ATMEGA2561-16AU Datasheet - Page 227

• Manufacturer Part Number: ATMEGA2561-16AU
• Description: IC AVR MCU 256K 16MHZ 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA2561-16AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 6
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRRZ541, ATAVRRAVEN, ATAVRRZUSBSTICK, ATAVRRZ201
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 64TQFP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 16 MHz
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

21.9.5
21.10 Examples of Baud Rate Setting
Table 21-9.
2549M–AVR–09/10
14.4 K
19.2 K
28.8 K
38.4 K
Baud
(bps)
Rate
2400
4800
9600
UBRRnL and UBRRnH – USART Baud Rate Registers
UBRR
25
12
6
3
2
1
1
Examples of UBRRn Settings for Commonly Used Oscillator Frequencies
U2Xn = 0
f
-18.6%
osc
-7.0%
Error
0.2%
0.2%
8.5%
8.5%
8.5%
= 1.0000 MHz
• Bit 15:12 – Reserved Bits
These bits are reserved for future use. For compatibility with future devices, these bit must be
written to zero when UBRRH is written.
• Bit 11:0 – UBRR11:0: USART Baud Rate Register
This is a 12-bit register which contains the USART baud rate. The UBRRH contains the four
most significant bits, and the UBRRL contains the eight least significant bits of the USART baud
rate. Ongoing transmissions by the Transmitter and Receiver will be corrupted if the baud rate is
changed. Writing UBRRL will trigger an immediate update of the baud rate prescaler.
For standard crystal and resonator frequencies, the most commonly used baud rates for asyn-
chronous operation can be generated by using the UBRR settings in
on page
get baud rate, are bold in the table. Higher error ratings are acceptable, but the Receiver will
have less noise resistance when the error ratings are high, especially for large serial frames (see
“Asynchronous Operational Range” on page
lowing equation:
Bit
Read/Write
Initial Value
UBRR
51
25
12
8
6
3
2
U2Xn = 1
231. UBRR values which yield an actual baud rate differing less than 0.5% from the tar-
-3.5%
-7.0%
Error
0.2%
0.2%
0.2%
8.5%
8.5%
R/W
15
R
–
7
0
0
UBRR
47
23
11
7
5
3
2
R/W
U2Xn = 0
14
R
–
6
0
0
Error[%]
f
osc
ATmega640/1280/1281/2560/2561
Error
0.0%
0.0%
0.0%
0.0%
0.0%
0.0%
0.0%
R/W
13
=
= 1.8432 MHz
R
–
5
0
0
⎛
⎝
BaudRate
------------------------------------------------------- - 1
UBRR
95
47
23
15
11
BaudRate
R/W
7
5
12
R
–
4
0
0
U2Xn = 1
220). The error values are calculated using the fol-
UBRR[7:0]
Closest Match
Error
0.0%
0.0%
0.0%
0.0%
0.0%
0.0%
0.0%
R/W
R/W
11
3
0
0
–
UBRR
⎞
⎠
R/W
R/W
51
25
12
10
•
2
0
0
8
6
3
2
UBRR[11:8]
100%
U2Xn = 0
f
Table 21-9
osc
-3.5%
-7.0%
Error
0.2%
0.2%
0.2%
8.5%
8.5%
R/W
R/W
9
1
0
0
= 2.0000 MHz
UBRR
R/W
R/W
103
8
0
0
0
51
25
16
12
to
8
6
U2Xn = 1
Table 21-12
UBRRHn
UBRRLn
-3.5%
-7.0%
Error
0.2%
0.2%
0.2%
2.1%
0.2%
227