P89CV51RD2FBC,557 NXP Semiconductors, P89CV51RD2FBC,557 Datasheet - Page 29

IC 80C51 MCU FLASH 64K 44-TQFP

P89CV51RD2FBC,557

Manufacturer Part Number
P89CV51RD2FBC,557
Description
IC 80C51 MCU FLASH 64K 44-TQFP
Manufacturer
NXP Semiconductors
Series
89Cr
Datasheet

Specifications of P89CV51RD2FBC,557

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
P89CV5x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Cpu Family
89C
Device Core
80C51
Device Core Size
8b
Frequency (max)
40MHz
Total Internal Ram Size
1KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
568-4257
935284103557
P89CV51RD2FBC

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P89CV51RD2FBC,557
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
P89CV51RB2_RC2_RD2_3
Product data sheet
6.4.2 Mode 1
6.4.3 Mode 2
6.4.4 Mode 3
Mode 1 is the same as Mode 0, except that all 16 bits of the timer register (THn and TLn)
are used; see
Mode 2 configures the timer register as an 8-bit counter (TLn) with automatic reload, as
shown in
contents of THn, which must be preset by software. The reload leaves THn unchanged.
Mode 2 operation is the same for Timer 0 and Timer 1.
When Timer 1 is in Mode 3 it is stopped (holds its count). The effect is the same as setting
TR1 = 0.
Timer 0 in Mode 3 establishes TL0 and TH0 as two separate 8-bit counters. The logic for
Mode 3 and Timer 0 is shown in
T0GATE, TR0, INT0, and TF0. TH0 is locked into a timer function (counting machine
cycles) and takes over the use of TR1 and TF1 from Timer 1. Thus, TH0 now controls the
Timer 1 interrupt.
Mode 3 is provided for applications that require an extra 8-bit timer. With Timer 0 in
mode 3, the P89CV51RB2/RC2/RD2 can look like it has an additional timer.
Note: When Timer 0 is in Mode 3, Timer 1 can be turned on and off by switching it into
and out of its own Mode 3. It can still be used by the serial port as a baud rate generator,
or in any application not requiring an interrupt.
Fig 8.
Fig 9.
INTn pin
TnGate
INTn pin
Tn pin
osc/6
TnGate
TRn
Tn pin
osc/6
TRn
Timer/counter 0 or 1 in Mode 1 (16-bit counter)
Figure
Timer/counter 0 or 1 in Mode 2 (8-bit auto-reload)
Figure
9. Overflow from TLn not only sets TFn, but also reloads TLn with the
8.
Rev. 03 — 25 August 2009
C/T = 0
C/T = 1
C/T = 0
C/T = 1
Figure
10. TL0 uses the Timer 0 control bits: T0C/T,
P89CV51RB2/RC2/RD2
control
control
(8-bits)
TLn
(8-bits)
(8-bits)
TLn
THn
reload
(8-bits)
THn
overflow
80C51 with 1 kB RAM, SPI
overflow
TFn
© NXP B.V. 2009. All rights reserved.
TFn
interrupt
002aaa521
002aaa520
interrupt
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