P89CV51RD2FBC,557 NXP Semiconductors, P89CV51RD2FBC,557 Datasheet - Page 7

• Manufacturer Part Number: P89CV51RD2FBC,557
• Description: IC 80C51 MCU FLASH 64K 44-TQFP
• Manufacturer: NXP Semiconductors
• Series: 89Cr

Specifications of P89CV51RD2FBC,557

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: P89CV5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Cpu Family: 89C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 40MHz
• Total Internal Ram Size: 1KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4257; 935284103557; P89CV51RD2FBC

NXP Semiconductors
Table 3.
P89CV51RB2_RC2_RD2_3
Product data sheet
Symbol
P2[1]/A9
P2[2]/A10
P2[3]/A11
P2[4]/A12
P2[5]/A13
P2[6]/A14
P2[7]/A15
P3[0] to P3[7]
P3[0]/RXD
P3[1]/TXD
P3[2]/INT0
P3[3]/INT1
P3[4]/T0
P3[5]/T1
P3[6]/WR
P3[7]/RD
PSEN
P89CV51RB2/RC2/RD2 Pin description
Pin
PLCC44
25
26
27
28
29
30
31
11
13
14
15
16
17
18
19
32
TQFP44
19
20
21
22
23
24
25
5
7
8
9
10
11
12
13
26
Type
I/O
O
I/O
O
I/O
O
I/O
O
I/O
O
I/O
O
I/O
O
I/O with
internal
pull-up
I/O
I
I/O
O
I/O
I
I/O
I
I/O
I
I/O
I
I/O
O
I/O
O
O
Description
P2[1] — Port 2 bit 1.
A9 — Address bit 9.
P2[2] — Port 2 bit 2.
A10 — Address bit 10.
P2[3] — Port 2 bit 3.
A11 — Address bit 11.
P2[4] — Port 2 bit 4.
A12 — Address bit 12.
P2[5] — Port 2 bit 5.
A13 — Address bit 13.
P2[6] — Port 2 bit 6.
A14 — Address bit 14.
P2[7] — Port 2 bit 7.
A15 — Address bit 15.
Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3
pins are pulled HIGH by the internal pull-ups when 1s are written to them
and can be used as inputs in this state. As inputs, Port 3 pins that are
externally pulled LOW will source current (I
pull-ups.
P3[0] — Port 3 bit 0.
RXD — Serial input port.
P3[1] — Port 3 bit 1.
TXD — Serial output port.
P3[2] — Port 3 bit 2.
INT0 — External interrupt 0 input.
P3[3] — Port 3 bit 3.
INT1 — External interrupt 1 input.
P3[4] — Port 3 bit 4.
T0 — External count input to timer/counter 0.
P3[5] — Port 3 bit 5.
T1 — External count input to timer/counter 1.
P3[6] — Port 3 bit 6.
WR — External data memory write strobe.
P3[7] — Port 3 bit 7.
RD — External data memory read strobe.
Program Store Enable: PSEN is the read strobe for external program
memory. When the device is executing from internal program memory,
PSEN is inactive (HIGH). When the device is executing code from external
program memory, PSEN is activated twice each machine cycle, except that
two PSEN activations are skipped during each access to external data
memory.
Rev. 03 — 25 August 2009
…continued
P89CV51RB2/RC2/RD2
IL
) because of the internal
80C51 with 1 kB RAM, SPI
© NXP B.V. 2009. All rights reserved.
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